| /external/v8/src/mips64/ |
| disasm-mips64.cc | 842 Format(instr, "movt.'t 'fd, 'fs, 'Cc");
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerMIPS32.h | 225 void movt(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc);
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| mips64-mdmx.s | 13 movt.l $v1, $v12, $fcc5
|
| mips64-mdmx.d | 12 0+0008 <[^>]*> 46b56051 movt\.l \$f1,\$f12,\$fcc5
|
| /external/llvm/test/MC/Mips/ |
| target-soft-float.s | 292 movt.d $f2, $f2, $fcc0
294 movt.s $f2, $f2, $fcc1
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| diagnostics.s | 103 @ Out of range immediate for MOVT
104 movt r9, 0x10000
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| mips-opc.c | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| thumb2_bad_reg.s | 213 @ MOVT
214 movt r13, #1
215 movt r15, #1
|
| /external/v8/src/arm/ |
| disasm-arm.cc | 436 // Print the movw or movt instruction.
520 // 'mw: movt/movw instructions.
977 Format(instr, "movt'cond 'mw");
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 813 Format(instr, "movt.'t 'fd, 'fs, 'Cc");
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-operand-imm16-t32.cc | 53 M(movt) \
491 #include "aarch32/traces/assembler-cond-rd-operand-imm16-movt-t32.h"
[all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon_Resize.S | 115 movt r0, #:upper16:(CHUNKSIZE << 16) - 1
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/sh/arch/ |
| sh.s | 95 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh2.s | 108 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh2a-nofpu-or-sh3-nommu.s | 104 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh2a-nofpu-or-sh4-nommu-nofpu.s | 101 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh2a-or-sh3e.s | 106 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh2e.s | 137 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh3-nommu.s | 115 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh3.s | 109 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh3e.s | 113 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh4-nofpu.s | 114 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh4-nommu-nofpu.s | 120 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| sh4a-nofpu.s | 121 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-sh/arch/ |
| sh.s | 95 movt r4 ;!/* 0000nnnn00101001 movt <REG_N> */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}, arch_sh_up}
|
