| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips5-wrong-error.s | 35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips3/ |
| invalid-mips5-wrong-error.s | 35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips4/ |
| invalid-mips5-wrong-error.s | 35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| valid.s | 164 movt $zero,$s4,$fcc5
165 movt.d $f0,$f2,$fcc0
166 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips5-wrong-error.s | 37 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| mips5-fp.d | 53 0+00ac <[^>]*> 46d1f711 movt\.ps \$f28,\$f30,\$fcc4
|
| r6-removed.l | 153 .*:154: Error: opcode not supported on this processor: .* \(.*\) `movt \$10,\$11,\$fcc2'
154 .*:155: Error: opcode not supported on this processor: .* \(.*\) `movt.s \$f20,\$f21,\$fcc2'
155 .*:156: Error: opcode not supported on this processor: .* \(.*\) `movt.d \$f20,\$f22,\$fcc2'
156 .*:157: Error: opcode not supported on this processor: .* \(.*\) `movt.ps \$f20,\$f22,\$fcc2'
|
| sb1-ext-mdmx.s | 18 movt.l $v1, $v12, $fcc5
|
| micromips@mips5-fp.d | 54 [0-9a-f]+ <[^>]*> 579e 8460 movt\.ps \$f28,\$f30,\$fcc4
|
| sb1-ext-mdmx.d | 12 0+0008 <[^>]*> 46b56051 movt\.l \$f1,\$f12,\$fcc5
|
| micromips.s | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mcore/ |
| allinsn.d | 251 0+0a6 <movt>:
252 a6: 0298 movt r8, r9
|
| /external/vixl/benchmarks/aarch32/ |
| asm-disasm-speed-test.cc | 318 __ movt(sl, 0U);
453 __ movt(r7, 0U);
521 __ movt(r3, 0U);
653 __ movt(r3, 0U);
774 __ movt(r3, 0U);
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb2-diagnostics.s | 81 movt r0, foo2
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 108 movt $zero,$s4,$fcc5
109 movt.d $f0,$f2,$fcc0
110 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 123 movt $zero,$s4,$fcc5
124 movt.d $f0,$f2,$fcc0
125 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 123 movt $zero,$s4,$fcc5
124 movt.d $f0,$f2,$fcc0
125 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 124 movt $zero,$s4,$fcc5
125 movt.d $f0,$f2,$fcc0
126 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 165 movt $zero,$s4,$fcc5
166 movt.d $f0,$f2,$fcc0
167 movt.s $f30,$f2,$fcc1
|
| /art/compiler/linker/arm/ |
| relative_patcher_thumb2_test.cc | 288 0xc0, 0xf2, 0x00, 0x00, // MOVT r0, #0 (placeholder)
325 // Distribute the bits of the diff between the MOVW and MOVT:
333 uint32_t movt = 0xf2c00000u | // MOVT r0, #0 (placeholder), local
341 static_cast<uint8_t>(movt >> 16), static_cast<uint8_t>(movt >> 24),
342 static_cast<uint8_t>(movt >> 0), static_cast<uint8_t>(movt >> 8),
[all...] |
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| assembler_arm.cc | 345 // Moved to ARM32::AssemblerARM32::movt()
346 void Assembler::movt(Register rd, uint16_t imm16, Condition cond) {
[all...] |
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 177 movt $zero,$s4,$fcc5
178 movt.d $f0,$f2,$fcc0
179 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 193 movt $zero,$s4,$fcc5
194 movt.d $f0,$f2,$fcc0
195 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 193 movt $zero,$s4,$fcc5
194 movt.d $f0,$f2,$fcc0
195 movt.s $f30,$f2,$fcc1
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 194 movt $zero,$s4,$fcc5
195 movt.d $f0,$f2,$fcc0
196 movt.s $f30,$f2,$fcc1
|
