/external/lzma/Asm/x86/ |
XzCrc64Opt.asm | 111 CRC macro op0:req, op1:req, dest0:req, dest1:req, src:req, t:req
113 op1 dest1, DWORD PTR [r5 + src * 8 + 0800h * t + 4]
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/external/mesa3d/src/compiler/glsl/ |
ir.cpp | 194 ir_rvalue *op0, ir_rvalue *op1, 201 this->operands[1] = op1; 357 ir_expression::ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1) 362 this->operands[1] = op1; 383 this->type = op1->type; 384 } else if (op1->type->is_scalar()) { 388 this->type = glsl_type::get_mul_type(op0->type, op1->type); 390 assert(op0->type == op1->type); 403 assert(!op1->type->is_matrix()); 405 this->type = op1->type [all...] |
loop_analysis.cpp | 571 ir_variable *const op1 = rhs->operands[1]->variable_referenced(); local 573 if (((op0 != var) && (op1 != var)) 574 || ((op1 == var) && (rhs->operation == ir_binop_sub)))
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/hardware/intel/common/libmix/videodecoder/securevideo/baytrail/ |
secvideoparser.h | 67 } op1; member in union:_dec_ref_pic_marking_t::__anon47410::__anon47411
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/hardware/intel/common/libmix/videodecoder/securevideo/cherrytrail/ |
secvideoparser.h | 67 } op1; member in union:_dec_ref_pic_marking_t::__anon47424::__anon47425
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/toolchain/binutils/binutils-2.27/include/opcode/ |
d30v.h | 81 int op1; /* first part, "IALU1" for example */ member in struct:d30v_opcode
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/external/tensorflow/tensorflow/python/layers/ |
base_test.py | 499 layer1, op1 = _gen_layer(op) 500 layer2, op2 = _gen_layer(op1) 505 self.assertEqual(op1.name, 'my_layer_1/my_op:0') 512 layer1, op1 = _gen_layer(op, name='name_1') 513 layer2, op2 = _gen_layer(op1, name='name_2') 518 self.assertEqual(op1.name, 'name_1/my_op:0') 525 layer1, op1 = _gen_layer(op, name='name_2') 526 layer2, op2 = _gen_layer(op1, name='name_3') 531 self.assertEqual(op1.name, 'name_2/my_op:0')
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/toolchain/binutils/binutils-2.27/gas/config/ |
tc-d30v.c | 494 opcode->ecc << 28 | op->op1 << 25 | op->op2 << 20 | form->modifier << 18; 679 parallel_ok (struct d30v_insn *op1, 692 if ((op1->op->unit == IU && op2->op->unit == IU) 693 || (op1->op->unit == MU && op2->op->unit == MU)) 699 && (op1->op->flags_used & (FLAG_JMP | FLAG_JSR))) 705 if ((op1->ecc == ECC_TX && op2->ecc == ECC_FX) 706 || (op1->ecc == ECC_FX && op2->ecc == ECC_TX) 707 || (op1->ecc == ECC_XT && op2->ecc == ECC_XF) 708 || (op1->ecc == ECC_XF && op2->ecc == ECC_XT)) 718 f = op1->form [all...] |
/external/one-true-awk/ |
parse.c | 132 Node *op1(int a, Node *b) function 182 return op1(INDIRECT, celltonode(literal0, CUNK));
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/external/valgrind/none/tests/s390x/ |
dfp-1.c | 8 #define DFP_BINOP(insn, op1, op2, type, round, cc) \ 10 register type d1 asm("f0") = op1; \
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/frameworks/base/core/java/com/android/internal/widget/ |
OpReorderer.java | 221 final UpdateOp op1 = list.get(i); local 222 if (op1.cmd == MOVE) {
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/frameworks/support/v7/recyclerview/src/main/java/androidx/recyclerview/widget/ |
OpReorderer.java | 215 final AdapterHelper.UpdateOp op1 = list.get(i); local 216 if (op1.cmd == AdapterHelper.UpdateOp.MOVE) {
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/external/python/cpython3/Lib/ |
_pydecimal.py | [all...] |
/external/v8/src/arm64/ |
simulator-arm64.h | 725 T FPAdd(T op1, T op2); 728 T FPDiv(T op1, T op2); 743 T FPMul(T op1, T op2); 746 T FPMulAdd(T a, T op1, T op2); 752 T FPSub(T op1, T op2); 761 T FPProcessNaNs(T op1, T op2); 764 T FPProcessNaNs3(T op1, T op2, T op3);
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/external/v8/src/s390/ |
assembler-s390.h | 574 uint32_t op1 = opcode >> 4; 577 getfield<uint32_t, 4, 0, 8>(op1) | getfield<uint32_t, 4, 8, 12>(f1) | 582 uint32_t op1 = opcode >> 8; 585 getfield<uint64_t, 6, 0, 8>(op1) | getfield<uint64_t, 6, 8, 12>(f1) | 591 uint32_t op1 = opcode >> 8; 594 getfield<uint64_t, 6, 0, 8>(op1) | getfield<uint64_t, 6, 8, 12>(f1) | 601 uint32_t op1 = opcode >> 8; 604 getfield<uint64_t, 6, 0, 8>(op1) | getfield<uint64_t, 6, 8, 12>(f1) | 621 uint32_t op1 = opcode >> 4; 624 getfield<uint64_t, 6, 0, 8>(op1) | getfield<uint64_t, 6, 8, 12>(f1) [all...] |
/external/valgrind/VEX/priv/ |
guest_arm64_helpers.c | 1245 V128 op1; op1.w64[1] = dHi; op1.w64[0] = dLo; local 1266 V128 op1; op1.w64[1] = dHi; op1.w64[0] = dLo; local [all...] |
/toolchain/binutils/binutils-2.27/gold/ |
i386.cc | 3335 unsigned char op1 = view[-1]; local 3408 unsigned char op1 = view[-1]; local 3544 unsigned char op1 = view[-1]; local 3597 unsigned char op1 = view[-1]; local 3636 unsigned char op1 = view[-1]; local [all...] |
/external/llvm/lib/DebugInfo/DWARF/ |
DWARFDebugFrame.cpp | 113 uint64_t Op1 = Opcode & DWARF_CFI_PRIMARY_OPERAND_MASK; 118 addInstruction(Primary, Op1); 121 addInstruction(Primary, Op1, Data.getULEB128(Offset)); 171 auto op1 = Data.getULEB128(Offset); local 173 addInstruction(Opcode, op1, op2); 181 auto op1 = Data.getULEB128(Offset); local 183 addInstruction(Opcode, op1, op2);
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/external/tensorflow/tensorflow/core/kernels/ |
slice_op.cc | 367 T* op1 = op + ((d1 - begin[1]) * out_strides[1]); local 370 memcpy(static_cast<void*>(op1), static_cast<void*>(ip1), 385 T* op1 = op + ((d1 - begin[1]) * out_strides[1]); local 390 T* op2 = op1 + ((d2 - begin[2]) * out_strides[2]);
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/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/ |
tree-ssa-sccvn.h | 88 tree op1; member in struct:vn_reference_op_struct
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/prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
ext_test.go | 713 op1 := make([]byte, len(opcode)+1) 714 copy(op1, opcode) 717 op1[len(opcode)] = byte(i) 718 testfn(t, concat(fixed(op1...), enum16bit)) 735 op1 := make([]byte, len(opcode)+1) 736 copy(op1, opcode) 739 op1[len(opcode)] = byte(i) 740 testfn(t, filter(concat3(rexPrefixes, fixed(op1...), enum16bit), isValidREX))
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/prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
ext_test.go | 713 op1 := make([]byte, len(opcode)+1) 714 copy(op1, opcode) 717 op1[len(opcode)] = byte(i) 718 testfn(t, concat(fixed(op1...), enum16bit)) 735 op1 := make([]byte, len(opcode)+1) 736 copy(op1, opcode) 739 op1[len(opcode)] = byte(i) 740 testfn(t, filter(concat3(rexPrefixes, fixed(op1...), enum16bit), isValidREX))
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/prebuilts/go/darwin-x86/src/cmd/asm/internal/arch/ |
arm.go | 149 op1 := int64(0) 151 op1 = 1 158 (op1 << 20) | // MCR/MRC
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/prebuilts/go/linux-x86/src/cmd/asm/internal/arch/ |
arm.go | 149 op1 := int64(0) 151 op1 = 1 158 (op1 << 20) | // MCR/MRC
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
nv50_ir_emit_gk110.cpp | 969 uint32_t op2, op1; local 975 op1 = 0xc10; 979 op1 = 0xc30; 983 op1 = 0xc28; 988 op1 = 0; 991 emitForm_21(i, op2, op1); 1069 uint16_t op1, op2; local 1073 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break; 1074 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break; 1077 op1 = 0xb30 [all...] |