| /external/capstone/suite/MC/ARM/ |
| crc32.s.cs | 2 0x42,0x00,0x01,0xe1 = crc32b r0, r1, r2
3 0x42,0x00,0x21,0xe1 = crc32h r0, r1, r2 package
4 0x42,0x00,0x41,0xe1 = crc32w r0, r1, r2 package
5 0x42,0x02,0x01,0xe1 = crc32cb r0, r1, r2 package
6 0x42,0x02,0x21,0xe1 = crc32ch r0, r1, r2 package
7 0x42,0x02,0x41,0xe1 = crc32cw r0, r1, r2 package
|
| mode-switch.s.cs | 2 0x00,0xeb,0x01,0x00 = add.w r0, r0, r1
3 0x01,0x00,0x80,0xe0 = add r0, r0, r1
4 0x40,0x18 = adds r0, r0, r1
5 0x01,0x00,0x80,0xe0 = add r0, r0, r1
6 0x00,0xeb,0x01,0x00 = add.w r0, r0, r1
7 0x40,0x18 = adds r0, r0, r1
|
| /external/libcxx/test/std/experimental/memory/memory.resource.global/ |
| new_delete_resource.pass.cpp | 59 ex::memory_resource & r1 = *ex::new_delete_resource(); local
62 assert(&r1 == &r2);
64 assert(r1 == r2);
65 assert(r2 == r1);
66 assert(!(r1 != r2));
67 assert(!(r2 != r1));
71 ex::memory_resource & r1 = *ex::new_delete_resource(); local
74 assert(r1 != r2);
75 assert(!(r1 == r2));
81 ex::memory_resource & r1 = *ex::new_delete_resource() local
[all...] |
| /external/ltp/include/ |
| tst_kvercmp.h | 41 int tst_kvcmp(const char *cur_kver, int r1, int r2, int r3);
63 int tst_kvercmp(int r1, int r2, int r3);
70 int tst_kvercmp2(int r1, int r2, int r3, struct tst_kern_exv *vers);
|
| /prebuilts/ndk/r16/sources/cxx-stl/llvm-libc++/test/std/experimental/memory/memory.resource.global/ |
| new_delete_resource.pass.cpp | 59 ex::memory_resource & r1 = *ex::new_delete_resource(); local
62 assert(&r1 == &r2);
64 assert(r1 == r2);
65 assert(r2 == r1);
66 assert(!(r1 != r2));
67 assert(!(r2 != r1));
71 ex::memory_resource & r1 = *ex::new_delete_resource(); local
74 assert(r1 != r2);
75 assert(!(r1 == r2));
81 ex::memory_resource & r1 = *ex::new_delete_resource() local
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arc/ |
| ld.d | 9 0: 2130 0080 ld r0,\[r1,r2\]
10 4: 2132 0080 ldb r0,\[r1,r2\]
11 8: 2370 0101 ld.aw r1,\[r3,r4\]
12 c: 2235 00c1 ld[hw]+.x r1,\[r2,r3\]
15 1c: 111e 0000 ld r0,\[r1,30\]
16 20: 12ec 8001 ld r1,\[r2,-20\]
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| abs12.d | 9 0: e5910000 ldr r0, \[r1\]
11 4: e5910000 ldr r0, \[r1\]
13 8: e5910000 ldr r0, \[r1\]
15 c: e5910000 ldr r0, \[r1\]
17 10: e5910000 ldr r0, \[r1\]
19 14: e5910000 ldr r0, \[r1\]
|
| arm-it-bad.s | 5 mov r0, r1
8 moveq r0, r1
10 movgt r1, r2
|
| iwmmxt-bad.l | 2 [^:]*:1: Error: instruction cannot be conditional -- `wldrwgt wcgr0,\[r1\]'
3 [^:]*:2: Error: iWMMXt data register expected -- `wldrb wcgr0,\[r1\]'
4 [^:]*:3: Error: iWMMXt data register expected -- `wldrh wcgr0,\[r1\]'
5 [^:]*:4: Error: iWMMXt data register expected -- `wldrd wcgr0,\[r1\]'
6 [^:]*:5: Error: instruction cannot be conditional -- `wstrwgt wcgr0,\[r1\]'
7 [^:]*:6: Error: iWMMXt data register expected -- `wstrb wcgr0,\[r1\]'
8 [^:]*:7: Error: iWMMXt data register expected -- `wstrh wcgr0,\[r1\]'
9 [^:]*:8: Error: iWMMXt data register expected -- `wstrd wcgr0,\[r1\]'
10 [^:]*:9: Error: iWMMXt control register expected -- `tmcr wibble,r1'
11 [^:]*:10: Error: iWMMXt data or control register expected -- `wldrw wibble,\[r1\]'
[all...] |
| strex-t.d | 8 0+00 <[^>]+> e8c2 1f50 strexh r0, r1, \[r2\]
9 0+04 <[^>]+> e8c2 1f50 strexh r0, r1, \[r2\]
10 0+08 <[^>]+> e8cd 1f50 strexh r0, r1, \[sp\]
11 0+0c <[^>]+> e8c2 1f40 strexb r0, r1, \[r2\]
12 0+10 <[^>]+> e8c2 1f40 strexb r0, r1, \[r2\]
13 0+14 <[^>]+> e8cd 1f40 strexb r0, r1, \[sp\]
|
| thumb2_ldr_immediate_armv6.s | 6 ldr r1,=0x72727272
7 ldr r1,=0x63006300
8 ldr r1,=0x00510051
|
| arch7em.s | 14 pkhtb r1, r2, r3
15 pkhtb r1, r2, r3, asr #0x11
18 qadd r1, r2, r3
19 qadd16 r1, r2, r3
20 qadd8 r1, r2, r3
21 qasx r1, r2, r3
22 qaddsubx r1, r2, r3
23 qdadd r1, r2, r3
24 qdsub r1, r2, r3
25 qsub r1, r2, r
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cr16/ |
| beq0_test.d | 10 0: 71 0c beq0b r1,\*\+0x10 <main\+0x10>:s
11 2: b1 0c beq0b r1,\*\+0x18 <main\+0x18>:s
12 4: e1 0c beq0b r1,\*\+0x1e <main\+0x1e>:s
13 6: 71 0e beq0w r1,\*\+0x10 <main\+0x10>:s
14 8: b1 0e beq0w r1,\*\+0x18 <main\+0x18>:s
15 a: e1 0e beq0w r1,\*\+0x1e <main\+0x1e>:s
|
| jal_test.s | 7 jal (r2,r1)
8 jal (r6,r5),(r2,r1)
10 jal (r1,r0), (r4,r3)
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/v850/ |
| split-lo16.d | 6 0: 40 0e 00 00 movhi 0, r0, r1
8 4: 01 16 00 00 addi 0, r1, r2
10 8: 01 17 00 00 ld\.b 0\[r1\], r2
12 c: 81 17 01 00 ld\.bu 0\[r1\], r2
14 10: a1 17 45 23 ld\.bu 9029\[r1\], r2
15 14: 81 17 57 34 ld\.bu 13398\[r1\], r2
|
| split-lo16.s | 1 movhi hi(foo),r0,r1
2 addi lo(foo),r1,r2
3 ld.b lo(foo),r1,r2
4 ld.bu lo(foo),r1,r2
6 ld.bu lo(0x12345),r1,r2
7 ld.bu lo(0x123456),r1,r2
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/visium/ |
| immed-1.s | 4 moviq r1, 0
5 subi r1, (. - bar + 8)
6 addi r1, bar
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/xc16x/ |
| add.s | 3 add r0,r1
4 add r0,[r1]
5 add r0,[r1+]
|
| addc.s | 5 addc r0,r1
6 addc r0,[r1]
7 addc r0,[r1+]
|
| and.s | 6 and r0,r1
7 and r0,[r1]
8 and r0,[r1+]
|
| or.s | 5 or r0,r1
6 or r0,[r1]
7 or r0,[r1+]
|
| sub.s | 5 sub r0,r1
6 sub r0,[r1]
7 sub r0,[r1+]
|
| subc.s | 5 subc r0,r1
6 subc r0,[r1]
7 subc r0,[r1+]
|
| xor.s | 4 xor r0,r1
5 xor r0,[r1]
6 xor r0,[r1+]
|
| /device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ |
| div.asm | 34 RSBS r12, r1, r0, LSR #4
37 RSBS r12, r1, r0, LSR #8
52 ORRS r12, r0, r1
54 RSBS r12, r1, r0, LSR #1
57 RSBS r12, r1, r0, LSR #4
59 RSBS r12, r1, r0, LSR #8
64 RSBS r12, r1, r0, LSR #7
65 SUBCS r0, r0, r1, LSL #7
67 RSBS r12, r1, r0,LSR #6
68 SUBCS r0, r0, r1, LSL #6
[all...] |
