| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-operand-rm-rd-is-rn-in-it-block-t32.cc | 108 {{gt, r14, r14, r11}, true, gt, "gt r14 r14 r11", "gt_r14_r14_r11"},
114 {{ls, r14, r14, r11}, true, ls, "ls r14 r14 r11", "ls_r14_r14_r11"},
120 {{ge, r14, r14, r4}, true, ge, "ge r14 r14 r4", "ge_r14_r14_r4"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 121 {{mi, r10, r14, r13, LSL, 10},
124 "mi r10 r14 r13 LSL 10",
141 {{ge, r3, r14, r7, ROR, 7},
144 "ge r3 r14 r7 ROR 7",
161 {{ge, r14, r14, r8, LSL, 4},
164 "ge r14 r14 r8 LSL 4",
166 {{vs, r1, r5, r14, LSL, 15},
169 "vs r1 r5 r14 LSL 15"
[all...] |
| test-assembler-cond-rd-operand-rn-in-it-block-t32.cc | 110 {{eq, r0, r14}, true, eq, "eq r0 r14", "eq_r0_r14"},
125 {{eq, r1, r14}, true, eq, "eq r1 r14", "eq_r1_r14"},
140 {{eq, r2, r14}, true, eq, "eq r2 r14", "eq_r2_r14"},
155 {{eq, r3, r14}, true, eq, "eq r3 r14", "eq_r3_r14"},
170 {{eq, r4, r14}, true, eq, "eq r4 r14", "eq_r4_r14"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 131 {{ls, r13, r8, r14, LSR, 32},
134 "ls r13 r8 r14 LSR 32",
141 {{ls, r14, r2, r5, LSR, 2},
144 "ls r14 r2 r5 LSR 2",
151 {{le, r2, r0, r14, LSR, 3},
154 "le r2 r0 r14 LSR 3",
191 {{ge, r6, r14, r7, LSR, 19},
194 "ge r6 r14 r7 LSR 19",
216 {{al, r8, r14, r8, LSR, 14},
219 "al r8 r14 r8 LSR 14"
[all...] |
| test-assembler-cond-rd-rn-rm-t32.cc | 161 {{al, r8, r14, r8}, false, al, "al r8 r14 r8", "al_r8_r14_r8"},
175 {{al, r14, r6, r2}, false, al, "al r14 r6 r2", "al_r14_r6_r2"},
177 {{al, r1, r8, r14}, false, al, "al r1 r8 r14", "al_r1_r8_r14"},
189 {{al, r10, r14, r7}, false, al, "al r10 r14 r7", "al_r10_r14_r7"},
194 {{al, r7, r14, r12}, false, al, "al r7 r14 r12", "al_r7_r14_r12"}
[all...] |
| test-assembler-cond-rd-operand-rn-shift-rs-a32.cc | 119 {{mi, r9, r14, LSR, r9}, false, al, "mi r9 r14 LSR r9", "mi_r9_r14_LSR_r9"},
127 {{ge, r14, r6, ROR, r13},
130 "ge r14 r6 ROR r13",
132 {{vc, r14, r14, LSR, r11},
135 "vc r14 r14 LSR r11",
151 {{cc, r14, r1, LSR, r14},
[all...] |
| test-assembler-negative-cond-rd-rn-operand-rm-shift-rs-a32.cc | 109 {{cc, r14, r0, r15, LSR, r7},
110 "cc, r14, r0, r15, LSR, r7",
115 {{vc, r10, r14, r15, LSL, r1},
116 "vc, r10, r14, r15, LSL, r1",
133 {{cs, r15, r14, r15, LSL, r3},
134 "cs, r15, r14, r15, LSL, r3",
172 {{pl, r15, r9, r14, ROR, r13},
173 "pl, r15, r9, r14, ROR, r13",
175 {{vs, r15, r14, r13, LSL, r13},
176 "vs, r15, r14, r13, LSL, r13"
[all...] |
| test-assembler-cond-rd-rn-operand-imm12-t32.cc | 103 {{al, r14, r4, 3899}, false, al, "al r14 r4 3899", "al_r14_r4_3899"},
109 {{al, r13, r14, 2047}, false, al, "al r13 r14 2047", "al_r13_r14_2047"},
111 {{al, r11, r14, 2323}, false, al, "al r11 r14 2323", "al_r11_r14_2323"},
115 {{al, r3, r14, 4079}, false, al, "al r3 r14 4079", "al_r3_r14_4079"},
125 {{al, r4, r14, 1027}, false, al, "al r4 r14 1027", "al_r4_r14_1027"}
[all...] |
| test-assembler-cond-rd-rn-a32.cc | 106 {{ls, r14, r14}, false, al, "ls r14 r14", "ls_r14_r14"},
114 {{gt, r14, r0}, false, al, "gt r14 r0", "gt_r14_r0"},
135 {{al, r14, r11}, false, al, "al r14 r11", "al_r14_r11"},
143 {{lt, r14, r3}, false, al, "lt r14 r3", "lt_r14_r3"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 131 {{al, r14, r13, r10, LSL, 22},
134 "al r14 r13 r10 LSL 22",
141 {{al, r14, r11, r5, LSL, 15},
144 "al r14 r11 r5 LSL 15",
211 {{al, r14, r12, r11, LSL, 27},
214 "al r14 r12 r11 LSL 27",
231 {{al, r6, r14, r2, ROR, 13},
234 "al r6 r14 r2 ROR 13",
341 {{al, r14, r13, r13, ROR, 18},
344 "al r14 r13 r13 ROR 18"
[all...] |
| /external/libxaac/decoder/armv7/ |
| ixheaacd_esbr_radix4bfly.s | 26 STMFD sp!, {r4-r12, r14}
59 SUB r14, r7, r9
81 ADD r11, r8, r14
84 SUB r6, r8, r14
87 SMULL r14, r8, r10, r5
88 SMLAL r14, r8, r11, r4
94 SMULL r14, r8, r10, r4
95 SMLAL r14, r8, r11, r5
104 LDR r14, [r0], #4
115 RSB r14, r14, #
[all...] |
| ixheaacd_shiftrountine_with_rnd_eld.s | 6 STMFD sp!, {r4-r12, r14}
16 LDR r14, [r0], #4 @r1 = *qmfReal
26 ADD r7, r10, r14 @qmfImag[j] = add32(i1, r1)
30 @SUB r4,r10,r14 @*qmfReal++ = sub32(i1, r1)
31 SUB r4, r14, r10 @*qmfReal++ = sub32(r1, i1)
57 MOV r14, r3, lsl #1
66 STRH r5, [r2, r14]
84 STRH r7, [r12, r14]
|
| /external/libopus/celt/arm/ |
| celt_pitch_xcorr_arm_gnu.s | 277 @ r12,r14 = opus_val16 x[4]
291 LDR r14, [r4], #4 @ Load x[2...3]
302 SMLABB r6, r14, r11, r6 @ sum[0] = MAC16_16(sum[0],x_2,y_2)
303 SMLABT r7, r14, r11, r7 @ sum[1] = MAC16_16(sum[1],x_2,y_3)
304 SMLABB r8, r14, r10, r8 @ sum[2] = MAC16_16(sum[2],x_2,y_4)
305 SMLABT r9, r14, r10, r9 @ sum[3] = MAC16_16(sum[3],x_2,y_5)
306 SMLATT r6, r14, r11, r6 @ sum[0] = MAC16_16(sum[0],x_3,y_3)
308 SMLATB r7, r14, r10, r7 @ sum[1] = MAC16_16(sum[1],x_3,y_4)
309 SMLATT r8, r14, r10, r8 @ sum[2] = MAC16_16(sum[2],x_3,y_5)
310 SMLATB r9, r14, r11, r9 @ sum[3] = MAC16_16(sum[3],x_3,y_6
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/ |
| zarch-reloc.d | 9 0: c0 e5 00 00 00 00 [ ]*brasl %r14,0 <foo>
11 6: c0 e5 00 00 00 00 [ ]*brasl %r14,6 <foo\+0x6>
28 50: c0 e5 00 00 00 00 [ ]*brasl %r14,50 <bar>
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-s390/ |
| tlsbin_64.s | 24 stm %r6,%r14,24(%r15)
40 lgr %r14,%r15
42 stg %r14,0(%r14)
74 lmg %r6,%r14,208(%r15)
75 br %r14
|
| tlspic1_64.s | 36 stmg %r6,%r14,48(%r15)
84 lgr %r14,%r15
87 stg %r14,0(%r14)
96 brasl %r14,__tls_get_offset@plt:tls_gdcall:sg1
101 brasl %r14,__tls_get_offset@plt:tls_gdcall:sg2
106 brasl %r14,__tls_get_offset@plt:tls_gdcall:sl1
111 brasl %r14,__tls_get_offset@plt:tls_gdcall:sl2
116 brasl %r14,__tls_get_offset@plt:tls_gdcall:sh1
122 brasl %r14,__tls_get_offset@plt:tls_gdcall:sh
[all...] |
| tlsbinpic.s | 37 stm %r6,%r14,24(%r15)
77 lr %r14,%r15
81 st %r14,0(%r14)
89 bas %r14,0(%r7,%r13):tls_gdcall:sG1
95 bas %r14,0(%r7,%r13):tls_gdcall:sG2
100 bas %r14,0(%r7,%r13):tls_gdcall:sg1
105 bas %r14,0(%r7,%r13):tls_gdcall:sl1
110 bas %r14,0(%r7,%r13):tls_gdcall:sh1
115 bas %r14,0(%r7,%r13):tls_ldcall:sl
[all...] |
| tlsbinpic_64.s | 37 stmg %r6,%r14,48(%r15)
73 lgr %r14,%r15
76 stg %r14,0(%r14)
85 brasl %r14,__tls_get_offset@plt:tls_gdcall:sG1
91 brasl %r14,__tls_get_offset@plt:tls_gdcall:sG2
96 brasl %r14,__tls_get_offset@plt:tls_gdcall:sg1
101 brasl %r14,__tls_get_offset@plt:tls_gdcall:sl1
106 brasl %r14,__tls_get_offset@plt:tls_gdcall:sh1
111 brasl %r14,__tls_get_offset@plt:tls_ldcall:sl
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Syn_filt_32_opt.s | 41 STMFD r13!, {r4 - r12, r14}
49 LDR r14, =0xffff
54 AND r6, r6, r14
55 AND r8, r8, r14
65 AND r6, r6, r14
66 AND r8, r8, r14
76 AND r6, r6, r14
77 AND r8, r8, r14
87 AND r6, r6, r14
88 AND r8, r8, r14
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/z8k/ |
| inout.d | 18 14: 3d6e in r14,@r6
26 24: 3de6 in r6,@r14
42 44: 3cee inb rl6,@r14
45 4c: 3be8 0718 ind @r1,@r14,r7
54 70: 3b58 0ea8 ind @r10,@r5,r14
58 80: 3b18 0ae8 ind @r14,@r1,r10
61 8c: 3ae8 0718 indb @r1,@r14,r7
70 b0: 3a58 0ea8 indb @r10,@r5,r14
74 c0: 3a18 0ae8 indb @r14,@r1,r10
77 cc: 3be8 0710 indr @r1,@r14,r
[all...] |
| /external/linux-kselftest/tools/testing/selftests/x86/ |
| thunks.S | 31 pushq %r14
59 popq %r14
|
| /external/llvm/test/MC/X86/ |
| avx512vl-encoding.s | 19 // CHECK: vblendmpd 291(%rax,%r14,8), %xmm20, %xmm27
21 vblendmpd 291(%rax,%r14,8), %xmm20, %xmm27
75 // CHECK: vblendmpd 291(%rax,%r14,8), %ymm21, %ymm28
77 vblendmpd 291(%rax,%r14,8), %ymm21, %ymm28
131 // CHECK: vblendmps 291(%rax,%r14,8), %xmm20, %xmm24
133 vblendmps 291(%rax,%r14,8), %xmm20, %xmm24
187 // CHECK: vblendmps 291(%rax,%r14,8), %ymm23, %ymm17
189 vblendmps 291(%rax,%r14,8), %ymm23, %ymm17
243 // CHECK: vpblendmd 291(%rax,%r14,8), %xmm25, %xmm17
245 vpblendmd 291(%rax,%r14,8), %xmm25, %xmm1
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ELF/ |
| relocation.s | 19 leaq foo-bar(%r14),%r14
|
| /external/syslinux/gnu-efi/gnu-efi-3.0/gnuefi/ |
| setjmp_x86_64.S | 38 movq %r14, 40(%rdi) /* R14 */
53 movq 40(%rdi), %r14
|
| /prebuilts/go/darwin-x86/src/runtime/cgo/ |
| gcc_s390x.S | 34 basr %r14, %r2
52 br %r14 /* restored by lmg */
|
