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  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cris/
binop.d 14 [ ]+4:[ ]+@IR+0356@[ ]+@OC@\.b \$?r3,\$?r5
15 [ ]+6:[ ]+@IR+15d6@[ ]+@OC@\.w \$?r5,\$?r13
17 [ ]+a:[ ]+@IM+005a@[ ]+@OC@\.b \[\$?r0\],\$?r5
18 [ ]+c:[ ]+@IM+15da@[ ]+@OC@\.w \[\$?r5\],\$?r13
20 [ ]+10:[ ]+@IM+005e@[ ]+@OC@\.b \[\$?r0\+\],\$?r5
21 [ ]+12:[ ]+@IM+15de@[ ]+@OC@\.w \[\$?r5\+\],\$?r13
23 [ ]+16:[ ]+@IM+0f5e@ 0000[ ]+@OC@\.b 0x0,\$?r5
24 [ ]+1a:[ ]+@IM+0f5e@ 0100[ ]+@OC@\.b 0x1,\$?r5
25 [ ]+1e:[ ]+@IM+0f5e@ 7f00[ ]+@OC@\.b 0x7f,\$?r5
26 [ ]+22:[ ]+@IM+0f5e@ 8000[ ]+@OC@\.b 0x80,\$?r5
    [all...]
quick-u6.d 11 [ ]+2:[ ]+@IR+0b52@[ ]+@OC@[ ]+11,\$?r5
13 [ ]+6:[ ]+@IR+1f52@[ ]+@OC@[ ]+31,\$?r5
20 [ ]+12:[ ]+@IR+3952@[ ]+@OC@[ ]+57,\$?r5
22 [ ]+16:[ ]+@IR+3e52@[ ]+@OC@[ ]+62,\$?r5
24 [ ]+1a:[ ]+@IR+3e52@[ ]+@OC@[ ]+62,\$?r5
movem-to-reg.d 14 [ ]+4:[ ]+b5db[ ]+movem[ ]+\[\$?r5\],\$?r13
16 [ ]+8:[ ]+b5df[ ]+movem[ ]+\[\$?r5\+\],\$?r13
18 [ ]+c:[ ]+4255 bddb[ ]+movem[ ]+\[\$?r2\+\$?r5\.b\],\$?r13
20 [ ]+14:[ ]+4529 bddb[ ]+movem[ ]+\[\$?r2\+\[\$?r5\]\.b\],\$?r13
22 [ ]+1c:[ ]+452d b00b[ ]+movem[ ]+\[\$?r2\+\[\$?r5\+\]\.b\],\$?r0
24 [ ]+24:[ ]+5529 b22b[ ]+movem[ ]+\[\$?r2\+\[\$?r5\]\.w\],\$?r2
26 [ ]+2c:[ ]+552d b77b[ ]+movem[ ]+\[\$?r2\+\[\$?r5\+\]\.w\],\$?r7
28 [ ]+34:[ ]+6255 bccb[ ]+movem[ ]+\[\$?r2\+\$?r5\.d\],\$?r12
30 [ ]+3c:[ ]+6529 bddb[ ]+movem[ ]+\[\$?r2\+\[\$?r5\]\.d\],\$?r13
32 [ ]+44:[ ]+652d b00b[ ]+movem[ ]+\[\$?r2\+\[\$?r5\+\]\.d\],\$?r
    [all...]
reg-to-mem.d 14 [ ]+4:[ ]+@IM+c5db@[ ]+@OC@[ ]+\$?r13,\[\$?r5\]
16 [ ]+8:[ ]+@IM+c5df@[ ]+@OC@[ ]+\$?r13,\[\$?r5\+\]
18 [ ]+c:[ ]+4255 @IM+cddb@[ ]+@OC@[ ]+\$?r13,\[\$?r2\+\$?r5.b\]
20 [ ]+14:[ ]+4529 @IM+cddb@[ ]+@OC@[ ]+\$?r13,\[\$?r2\+\[\$?r5\].b\]
22 [ ]+1c:[ ]+452d @IM+c00b@[ ]+@OC@[ ]+\$?r0,\[\$?r2\+\[\$?r5\+\].b\]
24 [ ]+24:[ ]+5529 @IM+c22b@[ ]+@OC@[ ]+\$?r2,\[\$?r2\+\[\$?r5\].w\]
26 [ ]+2c:[ ]+552d @IM+c77b@[ ]+@OC@[ ]+\$?r7,\[\$?r2\+\[\$?r5\+\].w\]
28 [ ]+34:[ ]+6255 @IM+cccb@[ ]+@OC@[ ]+\$?r12,\[\$?r2\+\$?r5.d\]
30 [ ]+3c:[ ]+6529 @IM+cddb@[ ]+@OC@[ ]+\$?r13,\[\$?r2\+\[\$?r5\].d\]
32 [ ]+44:[ ]+652d @IM+c00b@[ ]+@OC@[ ]+\$?r0,\[\$?r2\+\[\$?r5\+\].d\
    [all...]
binop-cmpmove.d 14 [ ]+4:[ ]+@IR+4356@[ ]+@OC@\.b \$?r3,\$?r5
15 [ ]+6:[ ]+@IR+55d6@[ ]+@OC@\.w \$?r5,\$?r13
17 [ ]+a:[ ]+@IM+405a@[ ]+@OC@\.b \[\$?r0\],\$?r5
18 [ ]+c:[ ]+@IM+55da@[ ]+@OC@\.w \[\$?r5\],\$?r13
20 [ ]+10:[ ]+@IM+405e@[ ]+@OC@\.b \[\$?r0\+\],\$?r5
21 [ ]+12:[ ]+@IM+55de@[ ]+@OC@\.w \[\$?r5\+\],\$?r13
23 [ ]+16:[ ]+@IM+4f5e@ 0000[ ]+@OC@\.b 0x0,\$?r5
24 [ ]+1a:[ ]+@IM+4f5e@ 0100[ ]+@OC@\.b 0x1,\$?r5
25 [ ]+1e:[ ]+@IM+4f5e@ 7f00[ ]+@OC@\.b 0x7f,\$?r5
26 [ ]+22:[ ]+@IM+4f5e@ 8000[ ]+@OC@\.b 0x80,\$?r5
    [all...]
  /external/libhevc/decoder/arm/
ihevcd_fmt_conv_420sp_to_420p.s 96 LDR r5,[sp,#60] @//Load u2_dest_stridey
103 SUB r11,r5,r8 @// Dst Y increment
105 LDR r5,[sp,#72] @//Load disable_luma_copy flag
106 CMP r5,#0 @//skip luma if disable_luma_copy is non-zero
144 LDR r5,[sp,#64] @//Load u2_dest_strideuv
152 SUB r11,r5,r11 @// Dst U and V increment
154 LDR r5,[sp,#40] @//Load pu1_dest_v
158 MOVEQ r4,r5
159 MOVEQ r5,r3
173 VST1.8 D1,[r5]!
    [all...]
  /external/libxaac/decoder/armv7/
ixheaacd_apply_scale_fac.s 45 LDRSH r5, [r1], #2
51 CMP r5, #0x18
69 SUBS r6, r11, r5, ASR #2
72 AND r5, r5, #3
75 LDR r5, [r9, r5, LSL #2]
84 SMULWB r6, r6, r5
85 SMULWB r7, r7, r5
94 SMULWB r6, r6, r5
    [all...]
ixheaacd_autocorr_st2.s 44 LDR r5 , [r1, #4*(64-128)]
49 MOV r5, r5, ASR #3
56 SMULWT r10, r6 , r5
57 SMLAWT r8 , r7 , r5, r8
60 SMLAWT r11, r5 , r5, r11
78 MOV r5 , r7
92 SMLAWT r8 , r7 , r5, r8
93 SMULWT r0 , r6 , r5
    [all...]
ixheaacd_fft32x32_ld2_armv7.s 16 LDR r5, [r0, #96] @x_6 = x[24]
19 ADD r8, r3, r5 @xh0_1 = x_2 + x_6
20 SUB r9, r3, r5 @xl0_1 = x_2 - x_6
25 LDR r5, [r0, #100] @x_7 = x[24+1]
28 ADD r12, r3, r5 @xh1_1 = x_3 + x_7
29 SUB r14, r3, r5 @xl1_1 = x_3 - x_7
34 SUB r5, r7, r14 @n30 = xl0_0 - xl1_1
38 STR r5, [r0, #96] @x[24] = n30
43 ADD r5, r11, r9 @n31 = xl1_0 + xl0_1
47 STR r5, [r0, #100] @x[24+1] = n3
    [all...]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/
archv6.d 13 0+014 <[^>]*> fc4570c3 ? mcrr2 0, 12, r7, r5, cr3
14 0+018 <[^>]*> fc5570c3 ? mrrc2 0, 12, r7, r5, cr3
15 0+01c <[^>]*> e6852018 ? pkhbt r2, r5, r8
16 0+020 <[^>]*> e6852198 ? pkhbt r2, r5, r8, lsl #3
17 0+024 <[^>]*> e6852198 ? pkhbt r2, r5, r8, lsl #3
18 0+028 <[^>]*> 06852198 ? pkhbteq r2, r5, r8, lsl #3
19 0+02c <[^>]*> e6882015 ? pkhbt r2, r8, r5
20 0+030 <[^>]*> e68521d8 ? pkhtb r2, r5, r8, asr #3
21 0+034 <[^>]*> e68521d8 ? pkhtb r2, r5, r8, asr #3
22 0+038 <[^>]*> 068521d8 ? pkhtbeq r2, r5, r8, asr #
    [all...]
  /frameworks/av/media/libstagefright/codecs/mp3dec/src/asm/
pvmp3_polyphase_filter_window_gcc.s 69 ldr r5,[r3]
73 smlal r2,r9,lr,r5
77 smlal r5,r11,r2,r5
78 smull r6,r5,r2,r6
79 sub r9,r9,r5
80 ldr r5,[r1,#8]
83 smlal r6,r9,r5,r7
84 smull r6,r2,r5,r8
85 ldr r5,[r1,#0xc
    [all...]
  /external/libffi/src/powerpc/
darwin_closure.S 151 sg r5, (PARENT_PARM_BASE + GPR_BYTES * 2)(r1)
181 addi r5,r1,PARENT_PARM_BASE
201 addi r5,r1,(SAVE_SIZE-RESULT_BYTES) /* Otherwise, our return is here. */
230 lg r3,0(r5)
237 lfs f1,0(r5)
244 lfd f1,0(r5)
251 lfd f1,0(r5)
252 lfd f2,8(r5)
259 lbz r3,7(r5)
261 lbz r3,3(r5)
    [all...]
  /external/python/cpython2/Modules/_ctypes/libffi/src/powerpc/
darwin_closure.S 151 sg r5, (PARENT_PARM_BASE + GPR_BYTES * 2)(r1)
181 addi r5,r1,PARENT_PARM_BASE
201 addi r5,r1,(SAVE_SIZE-RESULT_BYTES) /* Otherwise, our return is here. */
230 lg r3,0(r5)
237 lfs f1,0(r5)
244 lfd f1,0(r5)
251 lfd f1,0(r5)
252 lfd f2,8(r5)
259 lbz r3,7(r5)
261 lbz r3,3(r5)
    [all...]
  /external/python/cpython3/Modules/_ctypes/libffi/src/powerpc/
darwin_closure.S 151 sg r5, (PARENT_PARM_BASE + GPR_BYTES * 2)(r1)
181 addi r5,r1,PARENT_PARM_BASE
201 addi r5,r1,(SAVE_SIZE-RESULT_BYTES) /* Otherwise, our return is here. */
230 lg r3,0(r5)
237 lfs f1,0(r5)
244 lfd f1,0(r5)
251 lfd f1,0(r5)
252 lfd f2,8(r5)
259 lbz r3,7(r5)
261 lbz r3,3(r5)
    [all...]
  /external/vixl/test/aarch32/
test-assembler-cond-rd-operand-rn-shift-rs-in-it-block-t32.cc 104 {{hi, r6, r6, ROR, r5}, true, hi, "hi r6 r6 ROR r5", "hi_r6_r6_ROR_r5"},
108 {{mi, r4, r4, LSL, r5}, true, mi, "mi r4 r4 LSL r5", "mi_r4_r4_LSL_r5"},
109 {{le, r5, r5, LSR, r6}, true, le, "le r5 r5 LSR r6", "le_r5_r5_LSR_r6"},
112 {{hi, r5, r5, LSL, r6}, true, hi, "hi r5 r5 LSL r6", "hi_r5_r5_LSL_r6"}
    [all...]
test-assembler-cond-rd-operand-rn-low-registers-in-it-block-t32.cc 100 {{eq, r0, r5}, true, eq, "eq r0 r5", "eq_r0_r5"},
108 {{eq, r1, r5}, true, eq, "eq r1 r5", "eq_r1_r5"},
116 {{eq, r2, r5}, true, eq, "eq r2 r5", "eq_r2_r5"},
124 {{eq, r3, r5}, true, eq, "eq r3 r5", "eq_r3_r5"},
132 {{eq, r4, r5}, true, eq, "eq r4 r5", "eq_r4_r5"}
    [all...]
test-assembler-cond-rdlow-rnlow-operand-immediate-zero-in-it-block-t32.cc 100 {{eq, r0, r5, 0}, true, eq, "eq r0 r5 0", "eq_r0_r5_0"},
108 {{eq, r1, r5, 0}, true, eq, "eq r1 r5 0", "eq_r1_r5_0"},
116 {{eq, r2, r5, 0}, true, eq, "eq r2 r5 0", "eq_r2_r5_0"},
124 {{eq, r3, r5, 0}, true, eq, "eq r3 r5 0", "eq_r3_r5_0"},
132 {{eq, r4, r5, 0}, true, eq, "eq r4 r5 0", "eq_r4_r5_0"}
    [all...]
  /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Arm/
Math64.S 25 stmfd sp!, {r4, r5, r6}
33 mov r5, r0
36 ldmfd sp!, {r4, r5, r6}
43 stmfd sp!, {r4, r5, r6}
44 mov r5, r0
46 mov r3, r5, lsr r2
54 ldmfd sp!, {r4, r5, r6}
61 stmfd sp!, {r4, r5, r6}
62 mov r5, r0
64 mov r3, r5, lsr r2
    [all...]
  /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/
Norm_Corr_opt.s 31 @ r5 --- t_max
59 ADD r5, r0, r11, LSL #1 @get the &exc[k]
63 MOV r0, r5
72 MOV r5, #64
89 SUBS r5, r5, #8
104 MOV r5, #0 @L_tmp = 0
116 SMLABB r5, r10, r11, r5 @L_tmp += xn[i] * excf[i]
117 SMLATT r5, r10, r11, r5 @L_tmp += xn[i+1] * excf[i+1
    [all...]
  /frameworks/av/media/libstagefright/codecs/m4v_h263/dec/src/
idct.cpp 131 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; /* butterfly nodes */ local
154 r5 = blk[B_SIZE * 7 + i];
158 if (!(r1 | r2 | r3 | r4 | r5 | r6 | r7))
182 r8 = W7 * (r4 + r5);
186 r5 = (r8 - (W1 + W7) * r5);
201 r6 = r5 + r7;
202 r5 -= r7;
209 r2 = (181 * (r4 + r5) + 128) >> 8; /* rounding */
210 r4 = (181 * (r4 - r5) + 128) >> 8
353 int32 r0, r1, r2, r3, r4, r5, r6, r7, r8; \/* butterfly nodes *\/ local
    [all...]
  /external/aac/libFDK/src/arm/
dct_arm.cpp 119 r5 accu2
133 LDR r5, local
139 r5, local
141 SMULWB r5, local
142 r5, local
147 SMLAWT r5, r4, r8, local
148 r5 // accu2 = accu2*val_tw.h + accu1*val_tw.l
176 STR r5, local
189 LDR r5, local
195 r5, local
197 SMULWB r5, local
198 r5, local
203 SMLAWT r5, r4, r8, local
232 STR r5, local
357 LDR r5, local
361 RSB r5, local
362 r5, local
364 SMULWT r9, r5, local
378 SMLAWB r5, local
379 r5, r8, local
384 STR r5, [r2], local
390 SMULWB r5, r7, local
395 RSB r5, local
396 r5, local
411 LDR r5, local
415 RSB r5, local
416 r5, local
418 SMULWT r9, r5, local
432 SMLAWB r5, local
433 r5, r8, local
438 STR r5, [r2], local
444 SMULWB r5, r7, local
449 RSB r5, local
450 r5, local
    [all...]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/score/
ls32ls16p.d 18 10: c0a28080 lw r5, \[r2, 128\]
19 14: c0a28080 lw r5, \[r2, 128\]
30 30: c4a28040 lh r5, \[r2, 64\]
31 34: c4a28040 lh r5, \[r2, 64\]
42 50: d8a28020 lbu r5, \[r2, 32\]
43 54: d8a28020 lbu r5, \[r2, 32\]
54 70: d0a28080 sw r5, \[r2, 128\]
55 74: d0a28080 sw r5, \[r2, 128\]
66 90: d4a28040 sh r5, \[r2, 64\]
67 94: d4a28040 sh r5, \[r2, 64\
    [all...]
  /external/libhevc/common/arm/
ihevc_intra_pred_luma_mode2.s 144 lsl r5, r3, #2
164 vst1.8 {d8},[r6],r5
165 vst1.8 {d9},[r7],r5
168 vst1.8 {d10},[r9],r5
171 vst1.8 {d11},[r14],r5
172 vst1.8 {d12},[r6],r5
175 vst1.8 {d13},[r7],r5
176 vst1.8 {d14},[r9],r5
179 vst1.8 {d15},[r14],r5
227 vst1.8 {d8},[r6],r5
    [all...]
  /external/libmpeg2/common/arm/
ideint_spatial_filter_a9.s 78 sub r5, r0, #1
82 vld1.8 d1, [r5]
83 add r5, r5, #2
86 vld1.8 d2, [r5]
99 sub r5, r0, #1
103 vld1.8 d4, [r5]
104 add r5, r5, #2
107 vld1.8 d5, [r5]
    [all...]
impeg2_format_conv.s 127 ldr r5, [sp, #32] @// Load u2_width from stack
133 sub r7, r7, r5 @// Source increment
135 sub r8, r8, r5 @// Destination increment
139 mov r6, r5
174 ldr r5, [sp, #32] @// Load u2_width from stack
181 sub r7, r7, r5, lsr #1 @// Source increment
183 sub r8, r8, r5 @// Destination increment
185 mov r5, r5, lsr #1
189 mov r6, r5
    [all...]

Completed in 1239 milliseconds

1 2 3 4 5 6 7 8 91011>>