| /external/llvm/test/MC/AArch64/ |
| basic-a64-instructions.s | [all...] |
| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 502 sbcs r4, r3
504 @ CHECK: sbcs r4, r3 @ encoding: [0x9c,0x41]
|
| basic-thumb2-instructions.s | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-thumb-instructions.s | 451 sbcs r4, r3
453 @ CHECK: sbcs r4, r3 @ encoding: [0x9c,0x41]
|
| basic-thumb2-instructions.s | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| thumb-eabi.d | 32 0+02c <[^>]+> 41a0 sbcs r0, r4
|
| thumb.d | 33 0+02c <[^>]+> 41a0 sbcs r0, r4
|
| thumb32.d | 195 0[0-9a-f]+ <[^>]+> 4180 sbcs r0, r0
196 0[0-9a-f]+ <[^>]+> 4185 sbcs r5, r0
197 0[0-9a-f]+ <[^>]+> 41a8 sbcs r0, r5
198 0[0-9a-f]+ <[^>]+> 41a8 sbcs r0, r5
199 0[0-9a-f]+ <[^>]+> eb75 0000 sbcs\.w r0, r5, r0
205 0[0-9a-f]+ <[^>]+> eb70 0000 sbcs\.w r0, r0, r0
[all...] |
| thumb32.s | 155 arit3 sbc sbcs sbc.w sbcs.w
|
| /external/capstone/suite/MC/ARM/ |
| basic-thumb2-instructions.s.cs | 666 0x71,0xf1,0x00,0x00 = sbcs r0, r1, #0
675 0x75,0xeb,0x06,0x04 = sbcs.w r4, r5, r6
677 0x71,0xeb,0x03,0x09 = sbcs.w r9, r1, r3
679 0x71,0xeb,0xc3,0x10 = sbcs.w r0, r1, r3, lsl #7
681 0x71,0xeb,0x23,0x00 = sbcs.w r0, r1, r3, asr #32
[all...] |
| /external/capstone/suite/MC/AArch64/ |
| basic-a64-instructions.s.cs | 368 0x7d,0x03,0x19,0x7a = sbcs w29, w27, w25
369 0x7f,0x00,0x04,0x7a = sbcs wzr, w3, w4
371 0x14,0x00,0x1f,0x7a = sbcs w20, w0, wzr
372 0x7d,0x03,0x19,0xfa = sbcs x29, x27, x25
373 0x7f,0x00,0x04,0xfa = sbcs xzr, x3, x4
375 0x14,0x00,0x1f,0xfa = sbcs x20, x0, xzr
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 2969 void sbcs(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
2972 void sbcs(Condition cond, Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
2975 void sbcs(EncodingSize size, function in class:vixl::aarch32::Assembler
[all...] |
| macro-assembler-aarch32.cc | [all...] |
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| assembler_arm.h | 477 void sbcs(Register rd, Register rn, Operand o, Condition cond = AL);
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-operand-const-a32.cc | 69 M(sbcs) \
[all...] |
| test-assembler-cond-rd-rn-operand-const-t32.cc | 69 M(sbcs) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-a32.cc | 69 M(sbcs) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 69 M(sbcs) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 69 M(sbcs) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 69 M(sbcs) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 69 M(sbcs) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-t32.cc | 69 M(sbcs) \
[all...] |
| /external/v8/src/arm64/ |
| assembler-arm64.cc | 1167 void Assembler::sbcs(const Register& rd, function in class:v8::internal::Assembler
[all...] |
| assembler-arm64.h | [all...] |
| /external/vixl/src/aarch64/ |
| assembler-aarch64.cc | 473 void Assembler::sbcs(const Register& rd, function in class:vixl::aarch64::Assembler
488 sbcs(rd, zr, operand);
[all...] |
