| /toolchain/binutils/binutils-2.27/include/opcode/ |
| m88k.h | 112 src1: SOURCE1, member in struct:IR_FIELDS
|
| /external/libvpx/libvpx/third_party/libyuv/source/ |
| planar_functions.cc | 729 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1,
795 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1,
901 void (*ARGBMultiplyRow)(const uint8* src0, const uint8* src1, uint8* dst,
962 void (*ARGBAddRow)(const uint8* src0, const uint8* src1, uint8* dst,
1028 void (*ARGBSubtractRow)(const uint8* src0, const uint8* src1, uint8* dst,
[all...] |
| /external/libyuv/files/source/ |
| planar_functions.cc | 904 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1,
980 void (*BlendPlaneRow)(const uint8* src0, const uint8* src1,
1088 void (*ARGBMultiplyRow)(const uint8* src0, const uint8* src1, uint8* dst,
1160 void (*ARGBAddRow)(const uint8* src0, const uint8* src1, uint8* dst,
[all...] |
| /external/mesa3d/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 501 st_src_reg src1 = undef_src,
508 st_src_reg src1 = undef_src,
514 st_src_reg src0, st_src_reg src1);
522 st_src_reg src1,
529 st_dst_reg dst, st_src_reg src0, st_src_reg src1);
646 st_src_reg src0, st_src_reg src1,
653 op = get_opcode(op, dst, src0, src1);
662 num_reladdr += src1.reladdr != NULL || src1.reladdr2 != NULL;
668 reladdr_to_temp(ir, &src1, &num_reladdr)
1032 st_src_reg src1 = orig_src1; local
[all...] |
| /external/mesa3d/src/compiler/glsl/ |
| lower_instructions.cpp | 1469 ir_variable *src1 = local
[all...] |
| /external/mesa3d/src/mesa/main/ |
| ffvertex_prog.c | 572 struct ureg src1,
610 emit_arg( &inst->SrcReg[1], src1 );
619 #define emit_op3(p, op, dst, mask, src0, src1, src2) \
620 emit_op3fn(p, op, dst, mask, src0, src1, src2, __func__, __LINE__)
622 #define emit_op2(p, op, dst, mask, src0, src1) \
623 emit_op3fn(p, op, dst, mask, src0, src1, undef, __func__, __LINE__)
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64.h | 609 void Push(const CPURegister& src0, const CPURegister& src1 = NoReg,
611 void Push(const CPURegister& src0, const CPURegister& src1,
621 void Push(const Register& src0, const FPRegister& src1);
730 // Poke 'src1' and 'src2' onto the stack. The values written will be adjacent
731 // with 'src2' at a higher address than 'src1'. The offset is in bytes.
735 void PokePair(const CPURegister& src1, const CPURegister& src2, int offset);
[all...] |
| /toolchain/binutils/binutils-2.27/binutils/testsuite/binutils-all/ |
| objcopy.exp | 64 set src1 tmpdir/bintest.o
66 remote_upload host $tempfile $src1
69 set src1 ${tempfile}
72 set status [remote_exec build cmp "${src1} ${src2}"]
|
| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| ir3_compiler_nir.c | 996 struct ir3_instruction *base_lo, *base_hi, *addr, *src0, *src1; local
1023 src1 = get_src(ctx, &intr->src[1])[0];
1026 addr = ir3_ADD_S(b, addr, 0, src1, 0);
1391 struct ir3_instruction **dst, *sam, *src0[12], *src1[4]; local
[all...] |
| /external/mesa3d/src/gallium/drivers/vc4/ |
| vc4_qir.c | 542 qir_inst(enum qop op, struct qreg dst, struct qreg src0, struct qreg src1)
549 inst->src[1] = src1;
|
| /external/skia/src/core/ |
| SkBitmapProcState.cpp | 630 SkPMColor src1 = src[SkFractionalIntToInt(fx)]; fx += dx;
634 dst[1] = src1;
|
| /external/skqp/src/core/ |
| SkBitmapProcState.cpp | 630 SkPMColor src1 = src[SkFractionalIntToInt(fx)]; fx += dx;
634 dst[1] = src1;
|
| /external/v8/src/crankshaft/ia32/ |
| lithium-gap-resolver-ia32.cc | 439 Operand src1 = cgen_->HighOperand(source); local
445 __ mov(tmp, src1);
|
| /external/icu/icu4c/source/i18n/unicode/ |
| ucol.h | [all...] |
| /external/mesa3d/src/amd/vulkan/ |
| radv_meta_blit.c | 465 flip_coords(unsigned *src0, unsigned *src1, unsigned *dst0, unsigned *dst1)
468 if (*src0 > *src1) {
470 *src0 = *src1;
471 *src1 = tmp;
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_disasm.c | 1132 src1(FILE *file, const struct gen_device_info *devinfo, brw_inst *inst) function
[all...] |
| brw_ir_vec4.h | 273 const src_reg &src1 = src_reg(),
|
| /packages/inputmethods/OpenWnn/libs/libwnnDictionary/ |
| OpenWnnDictionaryImplJni.c | 161 NJ_UINT8 src1, src2, src3; local
166 /* src1 src2 src3 */
172 src1 = ( ( ( src_tmp[ 0 ] & 0x03 ) << 2 ) | ( ( src_tmp[ 1 ] & 0xc0 ) >> 6 ) ) + 1;
176 dst[ o + 0 ] = 0xf0 | ( ( src1 & 0x1c ) >> 2 );
177 dst[ o + 1 ] = 0x80 | ( ( src1 & 0x03 ) << 4 ) | ( ( src2 & 0xf0 ) >> 4 );
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/include/cloog/ |
| int.h | 164 void cloog_seq_combine(cloog_int_t *dst, cloog_int_t m1, cloog_int_t *src1,
|
| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| lp_state_fs.c | 1718 LLVMValueRef src1[4 * 4]; local
[all...] |
| /external/mesa3d/src/mesa/swrast/ |
| s_blit.c | 674 GLubyte *src1 = srcMap + srcY1 * srcRowStride + srcXpos * bpp; local
679 src1, srcBuffer1);
683 _mesa_unpack_rgba_row(readFormat, srcWidth, src1, srcBuffer1);
|
| /external/opencv/cxcore/src/ |
| cxdxt.cpp | [all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.cc | [all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsicResize.cpp | 189 uchar4 const *src1,
203 uchar2 const *src1,
217 uchar const *src1,
|
| /toolchain/binutils/binutils-2.27/gas/config/ |
| bfin-parse.y | 29 #define DSP32ALU(aopcde, HL, dst1, dst0, src0, src1, s, x, aop) \
30 bfin_gen_dsp32alu (HL, aopcde, aop, s, x, dst0, dst1, src0, src1)
32 #define DSP32MAC(op1, MM, mmod, w1, P, h01, h11, h00, h10, dst, op0, src0, src1, w0) \
34 dst, src0, src1, w0)
36 #define DSP32MULT(op1, MM, mmod, w1, P, h01, h11, h00, h10, dst, op0, src0, src1, w0) \
38 dst, src0, src1, w0)
40 #define DSP32SHIFT(sopcde, dst0, src0, src1, sop, hls) \
41 bfin_gen_dsp32shift (sopcde, dst0, src0, src1, sop, hls)
43 #define DSP32SHIFTIMM(sopcde, dst0, immag, src1, sop, hls) \
44 bfin_gen_dsp32shiftimm (sopcde, dst0, immag, src1, sop, hls
[all...] |
