| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| fd2_compiler.c | 57 /* Internal-Temporary and Predicate register assignment:
64 * src register in some cases. But for now don't try to be clever.
66 * juggles the register usage and gets rid of unneeded temporaries.
68 * The predicate register must be valid across multiple TGSI
70 * once the predicate register is requested, until it is no longer
71 * needed, it gets the first register slot after after the TGSI
73 * internal temporaries get the register slots above this.
81 /* maps input register idx to prog->export_linkage idx: */
84 /* maps output register idx to prog->export_linkage idx: */
110 /* assign/get the input/export register # for given semantic idx a
[all...] |
| /external/v8/src/ic/ia32/ |
| handler-compiler-ia32.cc | 22 MacroAssembler* masm, Handle<Map> map, Register receiver, Register holder,
23 int accessor_index, int expected_arguments, Register scratch) {
27 // Save context register
52 // Restore context register.
59 void PropertyHandlerCompiler::PushVectorAndSlot(Register vector,
60 Register slot) {
73 void PropertyHandlerCompiler::PopVectorAndSlot(Register vector, Register slot) {
87 MacroAssembler* masm, Label* miss_label, Register receiver
[all...] |
| /external/v8/src/ic/x87/ |
| handler-compiler-x87.cc | 22 MacroAssembler* masm, Handle<Map> map, Register receiver, Register holder,
23 int accessor_index, int expected_arguments, Register scratch) {
27 // Save context register
52 // Restore context register.
59 void PropertyHandlerCompiler::PushVectorAndSlot(Register vector,
60 Register slot) {
73 void PropertyHandlerCompiler::PopVectorAndSlot(Register vector, Register slot) {
87 MacroAssembler* masm, Label* miss_label, Register receiver
[all...] |
| /external/vixl/src/aarch64/ |
| operands-aarch64.h | 41 // Some CPURegister methods can return Register or VRegister types, so we need
43 class Register;
136 // This assert is hit when the register has not been properly initialized.
197 // These assertions ensure that the size and type of the register are as
210 const Register& W() const;
211 const Register& X() const;
237 class Register : public CPURegister {
239 Register() : CPURegister() {}
240 explicit Register(const CPURegister& other)
244 Register(unsigned code, unsigned size) : CPURegister(code, size, kRegister) {
[all...] |
| abi-aarch64.h | 60 explicit ABI(Register stack_pointer = sp) : stack_pointer_(stack_pointer) {
122 return GenericOperand(Register(NGRN_++, operand_size * kBitsPerByte));
148 Register stack_pointer_;
149 // Next General-purpose Register Number.
151 // Next SIMD and Floating-point Register Number.
|
| /external/v8/src/ic/ |
| handler-compiler.cc | 43 Register NamedLoadHandlerCompiler::FrontendHeader(Register object_reg,
67 // Frontend for store uses the name register. It has to be restored before a
69 Register NamedStoreHandlerCompiler::FrontendHeader(Register object_reg,
84 Register PropertyHandlerCompiler::Frontend(Handle<Name> name) {
89 Register reg = FrontendHeader(receiver(), name, &miss, RETURN_HOLDER);
103 Register reg = Frontend(name);
115 Register holder = Frontend(name);
122 void NamedLoadHandlerCompiler::InterceptorVectorSlotPush(Register holder_reg)
[all...] |
| access-compiler.cc | 45 Register* PropertyAccessCompiler::GetCallingConvention(Isolate* isolate,
59 Register PropertyAccessCompiler::slot() const {
68 Register PropertyAccessCompiler::vector() const {
|
| /external/v8/src/crankshaft/ia32/ |
| lithium-gap-resolver-ia32.cc | 9 #include "src/register-configuration.h"
30 // and skipping such moves with register destinations keeps those
168 Register LGapResolver::GetFreeRegisterNot(Register reg) {
175 return Register::from_code(code);
212 __ pop(Register::from_code(spilled_register_));
221 __ pop(Register::from_code(spilled_register_));
227 Register LGapResolver::EnsureTempRegister() {
228 // 1. We may have already spilled to create a temp register.
230 return Register::from_code(spilled_register_)
[all...] |
| /external/vixl/test/aarch64/ |
| test-utils-aarch64.cc | 134 bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg) {
136 // Retrieve the corresponding X register so we can check that the upper part
150 bool Equal64(uint64_t expected, const RegisterDump* core, const Register& reg) {
172 // Retrieve the corresponding D register so we can check that the upper part
195 bool Equal64(const Register& reg0,
197 const Register& reg1) {
273 RegList PopulateRegisterArray(Register* w,
274 Register* x,
275 Register* r,
285 r[i] = Register(n, reg_size)
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm_vixl.cc | 130 const vixl32::Register& array,
132 const vixl32::Register& base) {
154 const vixl32::Register& base,
155 const vixl32::Register& end) {
194 vixl32::Register dest = InputRegisterAt(instruction_, 2);
196 vixl32::Register src_curr_addr = RegisterFrom(locations->GetTemp(0));
197 vixl32::Register dst_curr_addr = RegisterFrom(locations->GetTemp(1));
198 vixl32::Register src_stop_addr = RegisterFrom(locations->GetTemp(2));
199 vixl32::Register tmp = RegisterFrom(locations->GetTemp(3));
221 // any live register in this slow path
[all...] |
| /external/v8/src/compiler/ |
| bytecode-analysis.h | 12 #include "src/interpreter/bytecode-register.h"
26 void Add(interpreter::Register r);
27 void AddPair(interpreter::Register r);
28 void AddTriple(interpreter::Register r);
|
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 85 const Register sp = vixl_masm_.StackPointer();
86 // Since we are operating on register pairs, we would like to align on
113 const Register sp = vixl_masm_.StackPointer();
137 void Arm64Assembler::PoisonHeapReference(Register reg) {
143 void Arm64Assembler::UnpoisonHeapReference(Register reg) {
149 void Arm64Assembler::MaybePoisonHeapReference(Register reg) {
155 void Arm64Assembler::MaybeUnpoisonHeapReference(Register reg) {
161 void Arm64Assembler::GenerateMarkingRegisterCheck(Register temp, int code) {
162 // The Marking Register is only used in the Baker read barrier configuration.
166 vixl::aarch64::Register mr = reg_x(MR); // Marking Register
[all...] |
| /art/compiler/utils/x86/ |
| managed_register_x86.cc | 24 // Define register pairs.
42 Register low;
43 Register high;
68 Register low = AsRegisterPairLow();
69 Register high = AsRegisterPairHigh();
100 os << "No Register";
|
| /art/compiler/utils/x86_64/ |
| managed_register_x86_64.cc | 24 // Define register pairs.
41 Register low;
42 Register high;
63 Register low = AsRegisterPairLow().AsRegister();
64 Register high = AsRegisterPairHigh().AsRegister();
95 os << "No Register";
|
| /device/linaro/bootloader/OpenPlatformPkg/Include/Protocol/ |
| PlatformVirtualKeyboard.h | 57 PLATFORM_VIRTUAL_KBD_REGISTER Register;
|
| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/ |
| EfiPci.h | 26 UINT8 Register;
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/ |
| EfiPci.h | 33 UINT8 Register;
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| RamDisk.h | 33 Register a RAM disk with specified address, size and type.
58 @retval EFI_OUT_OF_RESOURCES The RAM disk register operation fails due to
97 EFI_RAM_DISK_REGISTER_RAMDISK Register;
|
| ReportStatusCodeHandler.h | 35 Register the callback function for ReportStatusCode() notification.
41 registered. The entity that registers for the callback should also register for an event upon
43 If the handler does not have a TPL dependency, it should register for a callback at TPL high. The
88 EFI_RSC_HANDLER_REGISTER Register;
|
| SmmReportStatusCodeHandler.h | 34 Register the callback function for ReportStatusCode() notification.
75 EFI_SMM_RSC_HANDLER_REGISTER Register;
|
| /device/linaro/bootloader/edk2/Nt32Pkg/WinNtOemHookStatusCodeHandlerDxe/ |
| WinNtOemHookStatusCodeHandlerDxe.c | 65 RscHandlerProtocol->Register (OemHookStatusCodeReport, TPL_HIGH_LEVEL);
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/Msr/ |
| Xeon5600Msr.h | 27 #include <Register/ArchitecturalMsr.h>
83 Thread. Offcore Response Event Select Register (R/W).
|
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi.c | 347 assert(reg->Register.Index <= bld_base->info->file_max[reg->Register.File]);
349 if (bld_base->emit_fetch_funcs[reg->Register.File]) {
350 res = bld_base->emit_fetch_funcs[reg->Register.File](bld_base, reg, stype,
353 assert(0 && "invalid src register in emit_fetch()");
357 if (reg->Register.Absolute) {
377 if (reg->Register.Negate) {
409 reg->Register.SwizzleX,
410 reg->Register.SwizzleY,
411 reg->Register.SwizzleZ
[all...] |
| /external/tensorflow/tensorflow/cc/framework/ |
| grad_op_registry.cc | 27 bool GradOpRegistry::Register(const string& op, GradFunc func) {
|
| /external/tensorflow/tensorflow/compiler/xla/service/cpu/ |
| custom_call_target_registry.cc | 26 void CustomCallTargetRegistry::Register(const std::string& symbol,
|
