| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| armv8-a-bad.s | 51 stlex r1, pc, [r0]
52 stlex r1, r0, [pc]
53 stlex pc, r0, [r1]
54 stlex r0, r0, [r1]
55 stlex r0, r1, [r0]
81 stlex r1, pc, [r0]
82 stlex r1, r0, [pc]
83 stlex pc, r0, [r1]
84 stlex r0, r0, [r1]
85 stlex r0, r1, [r0
[all...] |
| armv8-a.s | 26 stlex r0, r1, [r14]
27 stlex r1, r14, [r0]
28 stlex r14, r0, [r1]
80 stlex r0, r1, [r14]
81 stlex r1, r14, [r0]
82 stlex r14, r0, [r1]
|
| archv8m.s | 42 stlex r0, r1, [r2] label
|
| armv8-a-bad.l | 31 .*:51: Error: r15 not allowed here -- `stlex r1,pc,\[r0\]'
32 .*:52: Error: r15 not allowed here -- `stlex r1,r0,\[pc\]'
33 .*:53: Error: r15 not allowed here -- `stlex pc,r0,\[r1\]'
34 .*:54: Error: registers may not be the same -- `stlex r0,r0,\[r1\]'
35 .*:55: Error: registers may not be the same -- `stlex r0,r1,\[r0\]'
58 .*:81: Error: r15 not allowed here -- `stlex r1,pc,\[r0\]'
59 .*:82: Error: r15 not allowed here -- `stlex r1,r0,\[pc\]'
60 .*:83: Error: r15 not allowed here -- `stlex pc,r0,\[r1\]'
61 .*:84: Error: registers may not be the same -- `stlex r0,r0,\[r1\]'
62 .*:85: Error: registers may not be the same -- `stlex r0,r1,\[r0\]
[all...] |
| armv8-a.d | 26 0[0-9a-f]+ <[^>]+> e18e0e91 stlex r0, r1, \[lr\]
27 0[0-9a-f]+ <[^>]+> e1801e9e stlex r1, lr, \[r0\]
28 0[0-9a-f]+ <[^>]+> e181ee90 stlex lr, r0, \[r1\]
76 0[0-9a-f]+ <[^>]+> e8ce 1fe0 stlex r0, r1, \[lr\]
77 0[0-9a-f]+ <[^>]+> e8c0 efe1 stlex r1, lr, \[r0\]
78 0[0-9a-f]+ <[^>]+> e8c1 0fee stlex lr, r0, \[r1\]
|
| archv8m-base.d | 45 0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
|
| archv8m-main-dsp-1.d | 45 0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
|
| archv8m-main.d | 45 0+.* <[^>]*> e8c2 1fe0 stlex r0, r1, \[r2\]
|
| /external/llvm/test/CodeGen/ARM/ |
| ldaex-stlex.ll | 70 %res = call i32 @llvm.arm.stlex.p0i8(i32 %extval, i8* %addr)
79 %res = call i32 @llvm.arm.stlex.p0i16(i32 %extval, i16* %addr)
84 ; CHECK: stlex r0, r1, [r2]
86 %res = call i32 @llvm.arm.stlex.p0i32(i32 %val, i32* %addr)
90 declare i32 @llvm.arm.stlex.p0i8(i32, i8*) nounwind
91 declare i32 @llvm.arm.stlex.p0i16(i32, i16*) nounwind
92 declare i32 @llvm.arm.stlex.p0i32(i32, i32*) nounwind
|
| atomic-ops-v8.ll | 70 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
262 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
454 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
547 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
761 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
874 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
987 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]
[all...] |
| /external/valgrind/none/tests/arm/ |
| v8memory_a.c | 143 // These verify that stlex* do notice a cleared (missing) reservation.
144 printf("STLEX{,B,H,D} (reg) -- expected to fail\n\n");
145 MEM_TEST("clrex; stlex r9, r6, [r10]")
151 // These verify that stlex* do notice a successful reservation.
154 printf("STLEX{,B,H,D} (reg) -- expected to succeed\n\n");
155 MEM_TEST("ldaex r2, [r10] ; stlex r9, r6, [r10]")
|
| v8memory_t.c | 143 // These verify that stlex* do notice a cleared (missing) reservation.
144 printf("STLEX{,B,H,D} (reg) -- expected to fail\n\n");
145 MEM_TEST("clrex; stlex r9, r6, [r10]")
151 // These verify that stlex* do notice a successful reservation.
154 printf("STLEX{,B,H,D} (reg) -- expected to succeed\n\n");
155 MEM_TEST("ldaex r2, [r10] ; stlex r9, r6, [r10]")
|
| v8memory_a.stdout.exp | 157 STLEX{,B,H,D} (reg) -- expected to fail
159 clrex; stlex r9, r6, [r10] with r10 = middle_of_block
219 STLEX{,B,H,D} (reg) -- expected to succeed
221 ldaex r2, [r10] ; stlex r9, r6, [r10] with r10 = middle_of_block
|
| v8memory_t.stdout.exp | 157 STLEX{,B,H,D} (reg) -- expected to fail
159 clrex; stlex r9, r6, [r10] with r10 = middle_of_block
219 STLEX{,B,H,D} (reg) -- expected to succeed
221 ldaex r2, [r10] ; stlex r9, r6, [r10] with r10 = middle_of_block
|
| /external/capstone/suite/MC/ARM/ |
| load-store-acquire-release-v8-thumb.s.cs | 8 0xc7,0xe8,0xe2,0x1f = stlex r2, r1, [r7]
|
| load-store-acquire-release-v8.s.cs | 8 0x91,0x2e,0x87,0xe1 = stlex r2, r1, [r7]
|
| /external/llvm/test/MC/ARM/ |
| load-store-acquire-release-v8-thumb.s | 19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
|
| load-store-acquire-release-v8.s | 19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
|
| thumbv8m.s | 129 // CHECK: stlex r1, r2, [r3] @ encoding: [0xc3,0xe8,0xe1,0x2f]
130 stlex r1, r2, [r3] label
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| load-store-acquire-release-v8-thumb.txt | 18 # CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
|
| load-store-acquire-release-v8.txt | 17 # CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
|
| /external/clang/test/CodeGen/ |
| builtins-arm-exclusive.c | 275 // CHECK: call i32 @llvm.arm.stlex.p0i8(i32 4, i8* %addr)
281 // CHECK: call i32 @llvm.arm.stlex.p0i16(i32 42, i16* [[ADDR16]])
288 // CHECK: call i32 @llvm.arm.stlex.p0i32(i32 42, i32* [[ADDR32]])
309 // CHECK: call i32 @llvm.arm.stlex.p0i32(i32 1076754509, i32* [[TMP5]])
333 // CHECK: call i32 @llvm.arm.stlex.p0i32(i32 [[INTVAL]], i32* [[TMP5]])
|
| /external/llvm/test/Transforms/AtomicExpand/ARM/ |
| atomic-expansion-v8.ll | 30 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
98 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i8(i32 [[NEWVAL32]], i8* %ptr)
136 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
|
| /external/vixl/src/aarch32/ |
| constants-aarch32.cc | 396 return "stlex";
|
| /prebuilts/vndk/v27/arm/arch-arm-armv7-a-neon/shared/vndk-core/ |
| libvixl-arm.so | |
