| /external/valgrind/coregrind/m_demangle/ |
| vg_libciface.h | 51 #define memcpy(_dd,_ss,_sz) VG_(memcpy)((_dd),(_ss),(_sz))
52 #define memset(_ss,_cc,_sz) VG_(memset)((_ss),(_cc),(_sz))
55 #define strcat(_dd,_ss) VG_(strcat)((_dd),(_ss))
56 #define strchr(_ss,_cc) VG_(strchr)((_ss),(_cc))
58 #define strcpy(_dd,_ss) VG_(strcpy)((_dd),(_ss))
[all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Protocol/SmmCpuState/ |
| CpuSaveState.h | 56 ASM_UINT32 _SS;
122 ASM_UINT32 _SS;
|
| /external/clang/test/CodeGenCXX/ |
| dllimport-rtti.cpp | 8 // MSVC-DAG: @"\01??_SS@@6B@" = unnamed_addr alias i8*, getelementptr inbounds ([2 x i8*], [2 x i8*]* [[VF_S]], i32 0, i32 1)
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Thunk16/Ia32/ |
| Thunk16.asm | 76 _SS DW ?
95 movzx edx, [esi]._SS
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Thunk16/X64/ |
| Thunk16.asm | 70 _SS DW ?
93 movzx r10, (IA32_REGS ptr [rsi])._SS
|
| Thunk16.S | 70 #_SS DW ?
99 movzwq 0x36(%rsi),%r10 #movzx r10, (IA32_REGS ptr [rsi])._SS
|
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Protocol/ |
| SmmCpuSaveState.h | 60 UINT32 _SS;
131 UINT32 _SS;
|
| /device/linaro/bootloader/edk2/OvmfPkg/Include/Register/ |
| QemuSmramSaveStateMap.h | 45 UINT32 _SS; // 7fb0h
83 UINT16 _SS; // 7e20h
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/ |
| SmramSaveStateMap.h | 58 UINT32 _SS; // 7fb0h
127 UINT32 _SS;
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
| Thunk16.S | 43 .set _SS, 50 #size 2
169 movzwl _SS(%esi), %edx
|
| Thunk16.asm | 55 _SS DW ?
221 movzx edx, (IA32_REGS ptr [esi])._SS
|
| Thunk16.nasm | 49 ._SS: resw 1
219 movzx edx, word [esi + IA32_REGS._SS]
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/ |
| Thunk16.asm | 54 _SS DW ?
214 movzx edx, (IA32_REGS ptr [esi])._SS
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| fvec.h | 205 #define Fvec32s1_COMP(op) friend F32vec1 cmp##op (const F32vec1 &a,const F32vec1 &b) { return _mm_cmp##op##_ss(a,b); }
230 #define Fvec32s1_SELECT(op) inline F32vec1 select_##op (const F32vec1 &a,const F32vec1 &b,const F32vec1 &c,const F32vec1 &d) { F32vec1 mask = _mm_cmp##op##_ss(a,b); return((mask & c) | F32vec1((_mm_andnot_ps(mask,d)))); }
|
| /frameworks/base/tests/JankBench/scripts/external/ |
| statistics.py | 493 def _ss(data, c=None): function
556 T, ss = _ss(data, xbar)
604 ss = _ss(data, mu)
605 T, ss = _ss(data, mu)
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/X64/ |
| Thunk16.S | 48 .set _SS, 54 #size 2
267 movzwl _SS(%rsi), %r8d
|
| Thunk16.asm | 46 _SS DW ?
245 movzx r8d, (IA32_REGS ptr [rsi])._SS
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/X64/ |
| Thunk16.S | 48 .set _SS, 54 #size 2
257 movzwl _SS(%rsi), %r8d
|
| Thunk16.asm | 48 _SS DW ?
247 movzx r8d, (IA32_REGS ptr [rsi])._SS
|
| Thunk16.nasm | 49 ._SS: resw 1
254 movzx r8d, word [rsi + IA32_REGS._SS]
|
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/ |
| SmiException.asm | 134 _SS DW ?
514 movzx eax, (IA32_TSS ptr [ecx])._SS
664 mov (IA32_TSS ptr [ecx])._SS, ax
|
| SmiException.nasm | 130 ._SS: resw 1
511 movzx eax, word [ecx + IA32_TSS._SS]
661 o16 mov [ecx + IA32_TSS._SS], ax
|
| /external/python/cpython3/Lib/ |
| statistics.py | 526 def _ss(data, c=None): function
589 T, ss = _ss(data, xbar)
637 T, ss = _ss(data, mu)
|
| /device/linaro/bootloader/edk2/OvmfPkg/Library/SmmCpuFeaturesLib/ |
| SmmCpuFeaturesLib.c | 467 {4, 4, SMM_CPU_OFFSET (x86._SS) , SMM_CPU_OFFSET (x64._SS) , 0 , FALSE}, // EFI_SMM_SAVE_STATE_REGISTER_SS = 22
[all...] |
| /device/linaro/bootloader/edk2/UefiCpuPkg/PiSmmCpuDxeSmm/ |
| SmramSaveState.c | 157 {4, 4, SMM_CPU_OFFSET (x86._SS) , SMM_CPU_OFFSET (x64._SS) , 0 , FALSE}, // EFI_SMM_SAVE_STATE_REGISTER_SS = 22
|
