| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| xscale.s | 4 mia acc0, r0, r1
5 mialt acc0, r14, r13
7 miaph acc0, r2, r4
8 miaphne acc0, r5, r6
10 miaBB acc0, r7, r8
11 miaBT acc0, r9, r10
12 miaTB acc0, r12, r11
13 miaTT acc0, r0, r0
15 mar acc0, r1, r1
16 margt acc0, r2, r1
[all...] |
| xscale.d | 10 0+00 <foo> ee201010 mia acc0, r0, r1
11 0+04 <[^>]*> be20d01e mialt acc0, lr, sp
12 0+08 <[^>]*> ee284012 miaph acc0, r2, r4
13 0+0c <[^>]*> 1e286015 miaphne acc0, r5, r6
14 0+10 <[^>]*> ee2c8017 miaBB acc0, r7, r8
15 0+14 <[^>]*> ee2da019 miaBT acc0, r9, sl
16 0+18 <[^>]*> ee2eb01c miaTB acc0, ip, fp
17 0+1c <[^>]*> ee2f0010 miaTT acc0, r0, r0
18 0+20 <[^>]*> ec411000 mar acc0, r1, r1
19 0+24 <[^>]*> cc4c2000 margt acc0, r2, i
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/m68k/ |
| arch-cpu-1.s | 4 mac.w %d1l,%a1u,<<,%acc0
|
| arch-cpu-1.d | 11 0: a241 0280 macw %d1l,%a1u,<<,%acc0
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/frv/ |
| fr450-media-issue.s | 30 mwtacc.p fr0,acc0 ; M3
32 mwtacc.p fr0,acc0 ; M3
34 mwtacc.p fr0,acc0 ; M3
36 mwtacc.p fr0,acc0 ; M3
38 mwtacc.p fr0,acc0 ; M3
40 mwtacc.p fr0,acc0 ; M3
44 mqcpxrs.p fr0,fr2,acc0 ; M4
46 mqcpxrs.p fr0,fr2,acc0 ; M4
48 mqcpxrs.p fr0,fr2,acc0 ; M4
50 mqcpxrs.p fr0,fr2,acc0 ; M
[all...] |
| /prebuilts/go/darwin-x86/src/crypto/aes/ |
| gcm_amd64.s | 23 #define ACC0 X8
152 MOVOU (tPtr), ACC0
164 PXOR ACC0, B0
166 MOVOU (16*14)(pTbl), ACC0
168 MOVOU ACC0, ACC1
170 PCLMULQDQ $0x00, B0, ACC0
176 PXOR ACC0, ACCM
182 PXOR T0, ACC0
185 PCLMULQDQ $0x01, ACC0, T0
186 PSHUFD $78, ACC0, ACC
[all...] |
| /prebuilts/go/linux-x86/src/crypto/aes/ |
| gcm_amd64.s | 23 #define ACC0 X8
152 MOVOU (tPtr), ACC0
164 PXOR ACC0, B0
166 MOVOU (16*14)(pTbl), ACC0
168 MOVOU ACC0, ACC1
170 PCLMULQDQ $0x00, B0, ACC0
176 PXOR ACC0, ACCM
182 PXOR T0, ACC0
185 PCLMULQDQ $0x01, ACC0, T0
186 PSHUFD $78, ACC0, ACC
[all...] |
| /prebuilts/go/darwin-x86/src/crypto/elliptic/ |
| p256_asm_amd64.s | 18 #define acc0 R8 define
54 MOVQ (8*0)(x_ptr), acc0
59 BSWAPQ acc0
67 MOVQ acc0, (8*3)(res_ptr)
137 MOVQ $-1, acc0
147 SUBQ acc5, acc0
153 CMOVQEQ acc5, acc0
158 MOVQ acc0, (8*0)(res_ptr)
224 MOVQ AX, acc0
248 MOVQ acc0, A
1292 #define acc0 BX define
[all...] |
| /prebuilts/go/linux-x86/src/crypto/elliptic/ |
| p256_asm_amd64.s | 18 #define acc0 R8 define
54 MOVQ (8*0)(x_ptr), acc0
59 BSWAPQ acc0
67 MOVQ acc0, (8*3)(res_ptr)
137 MOVQ $-1, acc0
147 SUBQ acc5, acc0
153 CMOVQEQ acc5, acc0
158 MOVQ acc0, (8*0)(res_ptr)
224 MOVQ AX, acc0
248 MOVQ acc0, A
1292 #define acc0 BX define
[all...] |
| /external/boringssl/src/crypto/fipsmodule/bn/asm/ |
| armv8-mont.pl | 279 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("x$_",(19..26));
327 mov $acc0,xzr
388 stp $acc0,$acc1,[$tp],#8*2 // t[0..1]
389 adc $acc0,xzr,xzr // t[8]
402 adc $acc0,$acc0,$t1
415 adcs $acc0,$acc0,$t3
427 adcs $acc0,$acc0,$t
[all...] |
| x86-mont.pl | 135 $acc0="mm0"; # mmx register bank layout
164 &movq ($acc0,$mul1); # I wish movd worked for
165 &pand ($acc0,$mask); # inter-register transfers
170 &paddq ($car1,$acc0);
173 &movd ($acc0,&DWP(4,$ap)); # ap[1]
180 &pmuludq($acc0,$mul0); # ap[j]*bp[0]
182 &paddq ($car0,$acc0); # +=c0
185 &movq ($acc0,$car0);
186 &pand ($acc0,$mask);
188 &paddq ($car1,$acc0); # +=ap[j]*bp[0]
[all...] |
| rsaz-avx2.pl | 104 my $ACC0="%ymm0";
200 vmovdqu 32*0-128($np), $ACC0
211 vmovdqu $ACC0, 32*0-128($np)
265 vpmuludq 32*0-128($ap), $B1, $ACC0
296 vpmuludq 32*0-128($ap), $B1, $ACC0
297 vpaddq 32*0-192($tp0), $ACC0, $ACC0
316 vmovdqu $ACC0, 32*0-192($tp0)
333 vpmuludq 32*7-128($aap), $B2, $ACC0
335 vpaddq 32*9-192($tp0), $ACC0, $ACC
[all...] |
| /external/boringssl/src/crypto/fipsmodule/ec/asm/ |
| p256-x86_64-asm.pl | 136 my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("%r$_",(8..15));
214 mov %rax, $acc0
233 mov $acc0, %rax
247 mov $acc0, $t1
248 shl \$32, $acc0
251 add $acc0, $acc1 # +=acc[0]<<96
257 xor $acc0, $acc0
290 adc \$0, $acc0
303 adc \$0, $acc0
[all...] |
| /external/boringssl/src/crypto/fipsmodule/aes/asm/ |
| aes-x86_64.pl | 53 $acc0="%esi"; $mask80="%rsi";
96 movzb `&lo("$s0")`,$acc0
99 mov 0($sbox,$acc0,8),$t0
103 movzb `&hi("$s1")`,$acc0
106 xor 3($sbox,$acc0,8),$t0
110 movzb `&hi("$s3")`,$acc0
113 xor 3($sbox,$acc0,8),$t2
121 movzb `&lo("$s2")`,$acc0
124 xor 2($sbox,$acc0,8),$t0
128 movzb `&hi("$s3")`,$acc0
[all...] |
| /external/libvpx/libvpx/vp8/encoder/mips/msa/ |
| temporal_filter_msa.c | 27 v4i32 acc0, acc1, acc2, acc3; local
41 LD_SW2(acc, 4, acc0, acc1);
74 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w,
79 LD_SW2(acc, 4, acc0, acc1);
113 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w,
140 v4i32 acc0, acc1, acc2, acc3; local
157 LD_SW2(acc, 4, acc0, acc1);
195 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w,
201 LD_SW2(acc, 4, acc0, acc1);
235 ADD4(mod0_w, acc0, mod1_w, acc1, mod2_w, acc2, mod3_w, acc3, mod0_w, mod1_w
[all...] |
| /external/sonivox/arm-wt-22k/lib_src/ |
| eas_wtengine.c | 184 EAS_I32 acc0; local
220 acc0 = samp2 - samp1;
221 acc0 = acc0 * phaseFrac;
223 acc0 = samp1 + (acc0 >> NUM_PHASE_FRAC_BITS);
227 *pOutputBuffer++ = (EAS_I16)(acc0 >> 2);
232 acc0 = phaseFrac >> NUM_PHASE_FRAC_BITS;
235 if (acc0 > 0) {
238 pSamples += acc0;
283 EAS_I32 acc0; local
378 EAS_I32 acc0; local
[all...] |
| /external/mesa3d/src/gallium/drivers/ilo/shader/ |
| toy_legalize.c | 225 const struct toy_dst acc0 = local
233 /* acc0 = (src0 & 0x0000ffff) * src1 */
234 tc_MUL(tc, acc0, inst->src[0], inst->src[1]);
236 /* acc0 = (src0 & 0xffff0000) * src1 + acc0 */
241 /* dst = acc0 & 0xffffffff */
242 tc_MOV(tc, inst->dst, tsrc_from(acc0));
253 const struct toy_dst acc0 = tdst(TOY_FILE_ARF, GEN6_ARF_ACC0, 0); local
255 tc_MOV(tc, acc0, inst->src[2]);
|
| /external/boringssl/src/crypto/cipher_extra/asm/ |
| chacha20_poly1305_x86_64.pl | 85 my ($acc0,$acc1,$acc2)=map("%r$_",(10..12));
132 $code.="add $src, $acc0
140 mul $acc0
153 mul $acc0
156 mov %rdx, $acc0
165 add $acc0, $t2
170 $code.="mov $t0, $acc0
179 add $t0, $acc0
182 add $t2, $acc0
377 xor $acc0, $acc
[all...] |
| /prebuilts/go/darwin-x86/src/sync/ |
| mutex_test.go | 272 var acc0, acc1 uint64
280 acc0 -= 100
304 var acc0, acc1 uint64
309 acc0 -= 100
|
| /prebuilts/go/linux-x86/src/sync/ |
| mutex_test.go | 272 var acc0, acc1 uint64
280 acc0 -= 100
304 var acc0, acc1 uint64
309 acc0 -= 100
|
| /external/llvm/test/CodeGen/SystemZ/ |
| frame-20.ll | 80 %acc0 = fsub double %l0, %l0
81 %acc1 = fsub double %l1, %acc0
112 store volatile double %acc0, double *%ptr
209 %acc0 = fsub double %l0, %l0
210 %acc1 = fsub double %l1, %acc0
240 store volatile double %acc0, double *%ptr
311 %acc0 = fsub double %l0, %l0
312 %acc1 = fsub double %l1, %acc0
336 store volatile double %acc0, double *%ptr
396 %acc0 = fsub double %l0, %l
[all...] |
| /device/linaro/bootloader/edk2/SecurityPkg/Tcg/Tcg2Smm/ |
| Tpm.asl | 68 ACC0, 8,
120 if (LEqual (ACC0, 0xff))
|
| /device/linaro/bootloader/edk2/SecurityPkg/Tcg/TcgSmm/ |
| Tpm.asl | 62 ACC0, 8,
113 if (LEqual (ACC0, 0xff))
|
| /device/linaro/bootloader/edk2/SecurityPkg/Tcg/TrEESmm/ |
| Tpm.asl | 61 ACC0, 8,
111 if (LEqual (ACC0, 0xff))
|
| /prebuilts/go/darwin-x86/src/vendor/golang_org/x/crypto/chacha20poly1305/ |
| chacha20poly1305_amd64.s | 18 #define acc0 R10 define
199 #define polyAdd(S) ADDQ S, acc0; ADCQ 8+S, acc1; ADCQ $1, acc2
200 #define polyMulStage1 MOVQ (0*8)(BP), AX; MOVQ AX, t2; MULQ acc0; MOVQ AX, t0; MOVQ DX, t1; MOVQ (0*8)(BP), AX; MULQ acc1; IMULQ acc2, t2; ADDQ AX, t1; ADCQ DX, t2
201 #define polyMulStage2 MOVQ (1*8)(BP), AX; MOVQ AX, t3; MULQ acc0; ADDQ AX, t1; ADCQ $0, DX; MOVQ DX, acc0; MOVQ (1*8)(BP), AX; MULQ acc1; ADDQ AX, t2; ADCQ $0, DX
202 #define polyMulStage3 IMULQ acc2, t3; ADDQ acc0, t2; ADCQ DX, t3
203 #define polyMulReduceStage MOVQ t0, acc0; MOVQ t1, acc1; MOVQ t2, acc2; ANDQ $3, acc2; MOVQ t2, t0; ANDQ $-4, t0; MOVQ t3, t1; SHRQ $2, t2:t3; SHRQ $2, t3; ADDQ t0, acc0; ADCQ t1, acc1; ADCQ $0, acc2; ADDQ t2, acc0; ADCQ t3, acc1; ADCQ $0, acc2
205 #define polyMulStage1_AVX2 MOVQ (0*8)(BP), DX; MOVQ DX, t2; MULXQ acc0, t0, t1; IMULQ acc2, t2; MULXQ acc1, AX, DX; ADDQ AX, t1; ADCQ DX, t
[all...] |
