/external/llvm/test/CodeGen/AArch64/ |
dp2.ll | 26 ; CHECK: {{asr|asrv}} {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}} 114 ; CHECK: {{asr|asrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} 166 ; CHECK: {{asr|asrv}} {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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/prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
objdump_test.go | 122 asrv
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tables.go | 30 ASRV 499 ASRV: "ASRV", 1054 // ASRV <Wd>, <Wn>, <Wm> 1055 {0xffe0fc00, 0x1ac02800, ASRV, instArgs{arg_Wd, arg_Wn, arg_Wm}, nil}, 1058 // ASRV <Xd>, <Xn>, <Xm> 1059 {0xffe0fc00, 0x9ac02800, ASRV, instArgs{arg_Xd, arg_Xn, arg_Xm}, nil}, [all...] |
inst.json | 27 {"Name":"ASR (register)","Bits":"0|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"ASR <Wd>, <Wn>, <Wm>","Code":"","Alias":"This instruction is an alias of the ASRV instruction."}, 28 {"Name":"ASR (register)","Bits":"1|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"ASR <Xd>, <Xn>, <Xm>","Code":"","Alias":"This instruction is an alias of the ASRV instruction."}, 31 {"Name":"ASRV","Bits":"0|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"ASRV <Wd>, <Wn>, <Wm>","Code":"","Alias":"This instruction is used by the alias ASR (register)."}, 32 {"Name":"ASRV","Bits":"1|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"ASRV <Xd>, <Xn>, <Xm>","Code":"","Alias":"This instruction is used by the alias ASR (register)."}, [all...] |
/prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
objdump_test.go | 122 asrv
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tables.go | 30 ASRV 499 ASRV: "ASRV", 1054 // ASRV <Wd>, <Wn>, <Wm> 1055 {0xffe0fc00, 0x1ac02800, ASRV, instArgs{arg_Wd, arg_Wn, arg_Wm}, nil}, 1058 // ASRV <Xd>, <Xn>, <Xm> 1059 {0xffe0fc00, 0x9ac02800, ASRV, instArgs{arg_Xd, arg_Xn, arg_Xm}, nil}, [all...] |
inst.json | 27 {"Name":"ASR (register)","Bits":"0|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"ASR <Wd>, <Wn>, <Wm>","Code":"","Alias":"This instruction is an alias of the ASRV instruction."}, 28 {"Name":"ASR (register)","Bits":"1|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"ASR <Xd>, <Xn>, <Xm>","Code":"","Alias":"This instruction is an alias of the ASRV instruction."}, 31 {"Name":"ASRV","Bits":"0|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"32-bit variant","Syntax":"ASRV <Wd>, <Wn>, <Wm>","Code":"","Alias":"This instruction is used by the alias ASR (register)."}, 32 {"Name":"ASRV","Bits":"1|0|0|1|1|0|1|0|1|1|0|Rm:5|0|0|1|0|1|0|Rn:5|Rd:5","Arch":"64-bit variant","Syntax":"ASRV <Xd>, <Xn>, <Xm>","Code":"","Alias":"This instruction is used by the alias ASR (register)."}, [all...] |
/toolchain/binutils/binutils-2.27/opcodes/ |
aarch64-asm-2.c | 165 case 678: /* asrv */ 166 value = 678; /* --> asrv. */
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aarch64-dis-2.c | [all...] |
/external/llvm/test/MC/AArch64/ |
arm64-arithmetic-encoding.s | 394 asrv w1, w2, w3 395 asrv x1, x2, x3
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/external/valgrind/none/tests/arm64/ |
integer.stdout.exp | [all...] |
/external/pcre/dist2/src/sljit/ |
sljitNativeARM_64.c | 70 #define ASRV 0x9ac02800 754 FAIL_IF(push_inst(compiler, (ASRV ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2))); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64SchedCyclone.td | 169 // ASRV,LSLV,LSRV,RORV,BFM,SBFM,UBFM
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/external/v8/src/arm64/ |
constants-arm64.h | [all...] |
disasm-arm64.cc | 603 FORMAT(ASRV, "asr"); [all...] |
macro-assembler-arm64-inl.h | 343 asrv(rd, rn, rm); [all...] |
assembler-arm64.cc | 1267 void Assembler::asrv(const Register& rd, function in class:v8::internal::Assembler [all...] |
assembler-arm64.h | [all...] |
/external/vixl/doc/aarch64/ |
supported-instructions-aarch64.md | 89 ### ASRV ### 93 void asrv(const Register& rd, const Register& rn, const Register& rm) [all...] |
/external/vixl/src/aarch64/ |
constants-aarch64.h | [all...] |
assembler-aarch64.cc | 572 void Assembler::asrv(const Register& rd, function in class:vixl::aarch64::Assembler 577 Emit(SF(rd) | ASRV | Rm(rm) | Rn(rn) | Rd(rd)); [all...] |
assembler-aarch64.h | 678 void asrv(const Register& rd, const Register& rn, const Register& rm); [all...] |
macro-assembler-aarch64.h | [all...] |
/external/vixl/test/aarch64/ |
test-trace-aarch64.cc | 69 __ asrv(w15, w16, w17); 70 __ asrv(x18, x19, x20); [all...] |
/external/valgrind/VEX/priv/ |
guest_arm64_toIR.c | [all...] |