| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| widen_conv-3.ll | 2 ; CHECK: cvtsi2ss
|
| widen_conv-4.ll | 2 ; CHECK: cvtsi2ss
|
| uint64-to-float.ll | 39 ; CHECK: cvtsi2ss
41 ; CHECK-NEXT: cvtsi2ss
|
| uint_to_fp.ll | 2 ; RUN: llc < %s -march=x86 -mcpu=yonah | grep cvtsi2ss
|
| /external/llvm/test/CodeGen/X86/ |
| uint64-to-float.ll | 12 ; CHECK: cvtsi2ss
17 ; CHECK-NEXT: cvtsi2ss
|
| break-false-dep.ll | 69 ; This loop contains two cvtsi2ss instructions that update the same xmm
73 ; If the register allocator chooses different registers for the two cvtsi2ss
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| x86-64-simd.s | 10 cvtsi2ss %eax, %xmm1
14 cvtsi2ss %rax, %xmm1
18 cvtsi2ss (%rax), %xmm1
137 cvtsi2ss xmm1,eax label
141 cvtsi2ss xmm1,rax label
145 cvtsi2ss xmm1,DWORD PTR [rax] label
149 cvtsi2ss xmm1,QWORD PTR [rax] label
|
| simd.s | 93 cvtsi2ss %eax, %xmm1
97 cvtsi2ss (%eax), %xmm1
189 cvtsi2ss xmm1,eax label
193 cvtsi2ss xmm1,DWORD PTR [eax] label
194 cvtsi2ss xmm1,[eax] label
|
| inval.s | 68 cvtsi2ss xmm1,QWORD PTR [eax]
|
| x86-64-simd-intel.d | 18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
26 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
28 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
30 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ss xmm1,QWORD PTR \[rax\]
135 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
137 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
139 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,ra
[all...] |
| simd-intel.d | 96 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
98 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
100 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[eax\]
102 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[eax\]
189 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
191 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
193 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[eax\]
194 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[eax\]
197 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[eax\]
|
| x86-64-opcode.s | 177 # CVTSI2SS
178 CVTSI2SS (%r8),%xmm0 # -- -- F3 41 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper reg.
179 CVTSI2SS (%rax),%xmm0 # -- -- F3 -- 0f 2a 00 ; OVR 128-bit media instruction override
180 CVTSI2SS (%r8),%xmm15 # -- -- F3 45 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
181 CVTSI2SS (%rax),%xmm15 # -- -- F3 44 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper XMM reg
182 CVTSI2SS (%r8),%xmm8 # -- -- F3 45 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg REX to access upper reg.
183 CVTSI2SS (%rax),%xmm8 # -- -- F3 44 0f 2a 00 ; OVR 128-bit media instruction override REX to access upper XMM reg
184 CVTSI2SS (%r8),%xmm7 # -- -- F3 41 0f 2a 38 ; OVR 128-bit media instruction override REX to access upper reg.
185 CVTSI2SS (%rax),%xmm7 # -- -- F3 -- 0f 2a 38 ; OVR 128-bit media instruction override
186 CVTSI2SS %eax,%xmm0 # -- -- F3 -- 0f 2a c0 ; OVR 128-bit media instruction over (…)
[all...] |
| katmai.s | 57 cvtsi2ss %ebp,%xmm4
58 cvtsi2ss (%esi),%xmm5
|
| x86-64-simd.d | 17 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
19 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
21 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
23 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
134 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
136 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
138 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
140 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
|
| simd.d | 95 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
97 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
188 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
190 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
|
| inval.l | 157 [ ]*68[ ]+cvtsi2ss xmm1,QWORD PTR \[eax\]
|
| x86-64-opcode.d | 142 [ ]*[a-f0-9]+: f3 0f 2a c0 cvtsi2ss %eax,%xmm0
143 [ ]*[a-f0-9]+: f3 44 0f 2a f8 cvtsi2ss %eax,%xmm15
144 [ ]*[a-f0-9]+: f3 44 0f 2a c0 cvtsi2ss %eax,%xmm8
145 [ ]*[a-f0-9]+: f3 0f 2a f8 cvtsi2ss %eax,%xmm7
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ilp32/ |
| x86-64-simd-intel.d | 18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,rax
26 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
28 [ ]*[a-f0-9]+: f3 0f 2a 08 cvtsi2ss xmm1,DWORD PTR \[rax\]
30 [ ]*[a-f0-9]+: f3 48 0f 2a 08 cvtsi2ss xmm1,QWORD PTR \[rax\]
135 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
137 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss xmm1,eax
139 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss xmm1,ra
[all...] |
| x86-64-simd.d | 18 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
20 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
22 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
24 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
135 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
137 [ ]*[a-f0-9]+: f3 0f 2a c8 cvtsi2ss %eax,%xmm1
139 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
141 [ ]*[a-f0-9]+: f3 48 0f 2a c8 cvtsi2ss %rax,%xmm1
|
| x86-64-opcode.d | 143 [ ]*[a-f0-9]+: f3 0f 2a c0 cvtsi2ss %eax,%xmm0
144 [ ]*[a-f0-9]+: f3 44 0f 2a f8 cvtsi2ss %eax,%xmm15
145 [ ]*[a-f0-9]+: f3 44 0f 2a c0 cvtsi2ss %eax,%xmm8
146 [ ]*[a-f0-9]+: f3 0f 2a f8 cvtsi2ss %eax,%xmm7
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| align-spill-locations.ll | 85 ; CHECK: cvtsi2ss xmm0,eax
|
| fp.convert.ll | 498 ; CHECK: cvtsi2ss
566 ; CHECK: cvtsi2ss
620 ; CHECK: cvtsi2ss
656 ; CHECK: cvtsi2ss
692 ; CHECK: cvtsi2ss
728 ; CHECK: cvtsi2ss
|
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.c | 203 //TEST_INSN( &AllMask, 0,cvtsi2ss)
434 //TEST_INSN( &AllMask, 0,cvtsi2ss)
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 488 void cvtsi2ss(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
489 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
490 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
| gnu.go | 124 case CVTSI2SD, CVTSI2SS:
264 case CVTSI2SD, CVTSI2SS:
527 case CVTSI2SS, CVTSI2SD, CVTSS2SI, CVTSD2SI, CVTTSD2SI, CVTTSS2SI:
|
