| /toolchain/binutils/binutils-2.27/opcodes/ |
| nds32-asm.c | 100 {"rt", 20, 5, 0, HW_GPR, NULL},
101 {"ra", 15, 5, 0, HW_GPR, NULL},
102 {"rb", 10, 5, 0, HW_GPR, NULL},
103 {"rd", 5, 5, 0, HW_GPR, NULL},
104 {"re", 10, 5, 0, HW_GPR, parse_re}, /* lmw smw lmwa smwa. */
135 {"rt5", 5, 5, 0, HW_GPR, NULL},
136 {"ra5", 0, 5, 0, HW_GPR, NULL},
137 {"rt4", 5, 4, 0, HW_GPR, NULL},
138 {"rt3", 6, 3, 0, HW_GPR, NULL},
139 {"rt38", 8, 3, 0, HW_GPR, NULL}, /* rt3 used in 38 form. *
[all...] |
| nds32-asm.h | 102 HW_GPR = 0,
|
| nds32-dis.c | 310 if (pfd->hw_res == HW_GPR)
413 if (pfd->hw_res == HW_GPR || pfd->hw_res == HW_CPR
|
| /external/mesa3d/src/gallium/drivers/r600/ |
| r600_asm.c | 364 int hw_gpr[NUM_OF_CYCLES][NUM_OF_COMPONENTS]; member in struct:alu_bank_swizzle
391 bs->hw_gpr[cycle][component] = -1;
400 if (bs->hw_gpr[cycle][chan] == -1)
401 bs->hw_gpr[cycle][chan] = sel;
402 else if (bs->hw_gpr[cycle][chan] != (int)sel) {
[all...] |
