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  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/
ldst-exclusive.d 26 48: 885f7ce1 ldxr w1, \[x7\]
27 4c: 885f7ce1 ldxr w1, \[x7\]
28 50: 885f7ce1 ldxr w1, \[x7\]
29 54: c85f7ce1 ldxr x1, \[x7\]
30 58: c85f7ce1 ldxr x1, \[x7\]
31 5c: c85f7ce1 ldxr x1, \[x7\]
ldst-exclusive.s 101 .irp op, ldxrb, ldxrh, ldxr
105 LR64 ldxr
  /external/protobuf/src/google/protobuf/stubs/
atomicops_internals_arm64_gcc.h 60 "ldxr %w[prev], %[ptr] \n\t" // Load the previous value.
84 "ldxr %w[result], %[ptr] \n\t" // Load the previous value.
104 "ldxr %w[result], %[ptr] \n\t" // Load the previous value.
196 "ldxr %[prev], %[ptr] \n\t"
220 "ldxr %[result], %[ptr] \n\t"
240 "ldxr %[result], %[ptr] \n\t"
  /prebuilts/tools/darwin-x86_64/protoc/include/google/protobuf/stubs/
atomicops_internals_arm64_gcc.h 60 "ldxr %w[prev], %[ptr] \n\t" // Load the previous value.
84 "ldxr %w[result], %[ptr] \n\t" // Load the previous value.
104 "ldxr %w[result], %[ptr] \n\t" // Load the previous value.
196 "ldxr %[prev], %[ptr] \n\t"
220 "ldxr %[result], %[ptr] \n\t"
240 "ldxr %[result], %[ptr] \n\t"
  /device/linaro/bootloader/edk2/MdePkg/Library/BaseSynchronizationLib/AArch64/
Synchronization.S 96 ldxr w3, [x0]
136 ldxr x3, [x0]
170 ldxr w1, [x0]
199 ldxr w1, [x0]
  /external/llvm/test/CodeGen/AArch64/
atomic-ops-not-barriers.ll 17 ; CHECK: ldxr
arm64-ldxr-stxr.ll 42 %val = call i64 @llvm.aarch64.ldxr.p0i8(i8* %addr)
56 %val = call i64 @llvm.aarch64.ldxr.p0i16(i16* %addr)
65 ; CHECK: ldxr w[[LOADVAL:[0-9]+]], [x0]
70 %val = call i64 @llvm.aarch64.ldxr.p0i32(i32* %addr)
79 ; CHECK: ldxr x[[LOADVAL:[0-9]+]], [x0]
82 %val = call i64 @llvm.aarch64.ldxr.p0i64(i64* %addr)
88 declare i64 @llvm.aarch64.ldxr.p0i8(i8*) nounwind
89 declare i64 @llvm.aarch64.ldxr.p0i16(i16*) nounwind
90 declare i64 @llvm.aarch64.ldxr.p0i32(i32*) nounwind
91 declare i64 @llvm.aarch64.ldxr.p0i64(i64*) nounwin
    [all...]
atomic-ops.ll 63 ; ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
83 ; ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
323 ; ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
403 ; ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
461 ; ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
549 ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
647 ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
671 ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
863 ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
941 ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]
    [all...]
arm64-atomic.ll 62 ; CHECK-NEXT: ldxr [[RESULT:x[0-9]+]], [x[[ADDR]]]
79 ; CHECK: ldxr w[[DEST_REG:[0-9]+]], [x0]
122 ; CHECK: ldxr [[DEST_REG:x[0-9]+]], [x[[ADDR]]]
  /external/clang/test/CodeGen/
aarch64-inline-asm.c 54 asm("ldxr %0, %1" : "=r"(val) : "Q"(var));
55 // CHECK: call i32 asm "ldxr $0, $1", "=r,*Q"(i64* @var)
builtins-arm-exclusive.c 17 // CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i8(i8* %addr)
26 // CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i16(i16* [[ADDR16]])
34 // CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* [[ADDR32]])
43 // CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i64(i64* [[ADDR64]])
49 // CHECK-ARM64: call i64 @llvm.aarch64.ldxr.p0i64(i64* %addr64)
57 // CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i32(i32* [[INTADDR]])
75 // CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]])
86 // CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]])
97 // CHECK-ARM64: [[INTRES:%.*]] = call i64 @llvm.aarch64.ldxr.p0i64(i64* [[TMP5]])
arm_acle.c 77 // AArch64: call i64 @llvm.aarch64.ldxr
  /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/
anames.go 110 "LDXR",
  /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/
anames.go 110 "LDXR",
  /external/valgrind/helgrind/tests/
tc07_hbl1.c 81 " ldxr w8, [%0, #0]\n" \
tc08_hbl2.c 103 " ldxr w8, [%0, #0]\n" \
annotate_hbefore.c 181 "ldxr %0, [%1]" "\n"
  /external/vixl/
README.md 124 `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
  /external/valgrind/VEX/priv/
host_arm64_defs.h 664 /* LDXR{,H,B} x2, [x4] */
683 ldxr x1, [x3]
    [all...]
  /external/valgrind/memcheck/tests/
atomic_incs.c 554 "ldxr w8, [x9]" "\n\t"
672 "ldxr x8, [x9]" "\n\t"
  /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/
tables.go 207 LDXR
676 LDXR: "LDXR",
    [all...]
  /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/
tables.go 207 LDXR
676 LDXR: "LDXR",
    [all...]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/
esa-g5.d 229 .*: 25 68 [ ]*ldxr %f6,%f8
257 .*: 25 78 [ ]*ldxr %f7,%f8
  /external/llvm/lib/Target/AArch64/
AArch64InstrAtomics.td 371 // live across basic block boundaries. When this happens between an LDXR and an
  /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/testdata/
arm64enc.s 222 LDXR (R27), R12 // 6c7f5fc8

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