| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| reg.s | 9 psllw $2, %mm6 label
10 psllw $2, %xmm6 label
29 psllw mm6, 2 label
30 psllw xmm6, 2 label
|
| x86-64-reg.s | 9 psllw $2, %mm6 label
10 psllw $2, %xmm10 label
29 psllw mm6, 2 label
30 psllw xmm2, 2 label
|
| reg-intel.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2
16 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw xmm6,0x2
33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2
34 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw xmm6,0x2
|
| x86-64-reg-intel.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2
16 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw xmm10,0x2
33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2
34 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw xmm2,0x2
|
| reg.d | 13 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6
14 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw \$0x2,%xmm6
31 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6
32 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw \$0x2,%xmm6
|
| x86-64-reg.d | 14 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6
15 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw \$0x2,%xmm10
32 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6
33 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw \$0x2,%xmm2
|
| /external/llvm/test/CodeGen/X86/ |
| 2011-12-15-vec_shift.ll | 9 ; CHECK-W-SSE4: psllw $4, [[REG1:%xmm.]]
11 ; CHECK-W-SSE4: psllw $2
14 ; CHECK-WO-SSE4: psllw $5, [[REG1:%xmm.]]
|
| vec_shift4.ll | 37 ; X32-NEXT: psllw $5, %xmm1
39 ; X32-NEXT: psllw $4, %xmm3
44 ; X32-NEXT: psllw $2, %xmm3
60 ; X64-NEXT: psllw $5, %xmm1
62 ; X64-NEXT: psllw $4, %xmm3
67 ; X64-NEXT: psllw $2, %xmm3
|
| vector-shift-shl-128.ll | 152 ; SSE2-NEXT: psllw $12, %xmm1
157 ; SSE2-NEXT: psllw $8, %xmm0
165 ; SSE2-NEXT: psllw $4, %xmm0
173 ; SSE2-NEXT: psllw $2, %xmm0
180 ; SSE2-NEXT: psllw $1, %xmm0
189 ; SSE41-NEXT: psllw $12, %xmm0
190 ; SSE41-NEXT: psllw $4, %xmm1
195 ; SSE41-NEXT: psllw $8, %xmm4
199 ; SSE41-NEXT: psllw $4, %xmm1
203 ; SSE41-NEXT: psllw $2, %xmm
[all...] |
| vector-rotate-128.ll | 261 ; SSE2-NEXT: psllw $12, %xmm1
265 ; SSE2-NEXT: psllw $8, %xmm4
274 ; SSE2-NEXT: psllw $4, %xmm2
282 ; SSE2-NEXT: psllw $2, %xmm2
289 ; SSE2-NEXT: psllw $1, %xmm2
291 ; SSE2-NEXT: psllw $12, %xmm3
332 ; SSE41-NEXT: psllw $12, %xmm0
333 ; SSE41-NEXT: psllw $4, %xmm1
338 ; SSE41-NEXT: psllw $8, %xmm6
343 ; SSE41-NEXT: psllw $4, %xmm
[all...] |
| vec_shift.ll | 8 ; X32-NEXT: psllw %xmm1, %xmm0
13 ; X64-NEXT: psllw %xmm1, %xmm0
|
| vshift-1.ll | 54 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
|
| shift-pcmp.ll | 30 ; SSE-NEXT: psllw $5, %xmm0
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ilp32/ |
| x86-64-reg-intel.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2
16 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw xmm10,0x2
33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2
34 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw xmm2,0x2
|
| x86-64-reg.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6
16 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw \$0x2,%xmm10
33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6
34 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw \$0x2,%xmm2
|
| /external/libvpx/libvpx/vp9/encoder/x86/ |
| vp9_dct_sse2.asm | 63 psllw m0, 2
64 psllw m1, 2
|
| /external/libvpx/libvpx/vpx_dsp/x86/ |
| fwd_txfm_ssse3_x86_64.asm | 52 psllw m0, 2
53 psllw m1, 2
54 psllw m2, 2
55 psllw m3, 2
56 psllw m4, 2
57 psllw m5, 2
58 psllw m6, 2
59 psllw m7, 2
|
| /external/libjpeg-turbo/simd/ |
| jfdctfst-mmx.asm | 183 psllw mm0,PRE_MULTIPLY_SCALE_BITS
207 psllw mm2,PRE_MULTIPLY_SCALE_BITS
208 psllw mm6,PRE_MULTIPLY_SCALE_BITS
210 psllw mm3,PRE_MULTIPLY_SCALE_BITS
324 psllw mm0,PRE_MULTIPLY_SCALE_BITS
348 psllw mm2,PRE_MULTIPLY_SCALE_BITS
349 psllw mm6,PRE_MULTIPLY_SCALE_BITS
351 psllw mm3,PRE_MULTIPLY_SCALE_BITS
|
| /external/mesa3d/src/mesa/x86/ |
| mmx_blend.S | 101 PSLLW ( CONST(8), MQ1 ) /* q1 << 8 */ ;\
105 TWO(PSLLW ( CONST(8), MQ2 )) /* q2 << 8 */ ;\
132 PSLLW ( CONST(8), MQ1 ) /* q1 << 8 */ ;\
136 TWO(PSLLW ( CONST(8), MQ2 )) /* q2 << 8 */ ;\
142 PSLLW ( CONST(8), MP1 ) /* q1 > p1 ? 0x100 : 0 */ ;\
143 TWO(PSLLW ( CONST(8), MP2 )) /* q2 > q2 ? 0x100 : 0 */ ;\
177 PSLLW ( CONST(8), MQ1 ) /* q1 << 8 */ ;\
181 TWO(PSLLW ( CONST(8), MQ2 )) /* q2 << 8 */ ;\
|
| /external/swiftshader/src/Reactor/ |
| x86.hpp | 77 RValue<Short4> psllw(RValue<Short4> x, unsigned char y);
78 RValue<Short8> psllw(RValue<Short8> x, unsigned char y);
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| vshift-1.ll | 54 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
|
| vec_shift.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
|
| /external/llvm/test/Analysis/CostModel/X86/ |
| testshiftshl.ll | 34 ; SSE2-CODEGEN: psllw
46 ; SSE2-CODEGEN: psllw
58 ; SSE2-CODEGEN: psllw
214 ; SSE2-CODEGEN: psllw
226 ; SSE2-CODEGEN: psllw
238 ; SSE2-CODEGEN: psllw
276 ; SSE2-CODEGEN: psllw $3
290 ; SSE2-CODEGEN: psllw $3
306 ; SSE2-CODEGEN: psllw $3
490 ; SSE2-CODEGEN: psllw $
[all...] |
| /external/libvpx/libvpx/vp8/encoder/x86/ |
| dct_sse2.asm | 92 psllw xmm0, 3 ;b1 <<= 3 a1 <<= 3
93 psllw xmm3, 3 ;c1 <<= 3 d1 <<= 3
227 psllw xmm5, 3
228 psllw xmm4, 3
230 psllw xmm0, 3
231 psllw xmm1, 3
|
| /external/v8/src/x64/ |
| sse-instr.h | 31 V(psllw, 66, 0F, F1) \
|
