| /external/mesa3d/src/gallium/drivers/swr/rasterizer/memory/ |
| tilingtraits.h | 148 /// @param qpitch - surface qpitch in rows
154 INLINE UINT ComputeTileOffset3D(UINT qpitch, UINT pitch, UINT tileX, UINT tileY, UINT tileZ)
156 UINT tileID = (tileZ * (qpitch >> TTraits::GetCv()) + tileY) * (pitch >> TTraits::GetCu()) + tileX;
195 /// @param qpitch - depth pitch in rows
201 INLINE UINT ComputeOffset3D(UINT qpitch, UINT pitch, UINT x, UINT y, UINT z)
203 UINT tileID = ComputeTileOffset3D<TTraits>(qpitch, pitch, x >> TTraits::GetCu(), y >> TTraits::GetCv(), z >> TTraits::GetCr());
|
| TilingFunctions.h | 407 xOffsetBytes = (array * pState->qpitch + lodOffset + x) * info.Bpp;
550 yOffsetRows = (array * pState->qpitch) + lodOffsetY + y + pState->yOffset;
606 return ComputeOffset3D<TTraits>(pState->qpitch, pState->pitch, xOffsetBytes, yOffsetRows, zOffsetSlices);
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_tex_layout.c | 387 * effectively end up with a packed qpitch anyway whenever
392 /* On Gen9 we can pick whatever qpitch we like as long as it's aligned
395 unsigned qpitch = mt->total_height; local
402 qpitch = ALIGN(qpitch, 8);
408 qpitch = ALIGN(qpitch, 32);
410 return qpitch;
474 /* When using the horizontal layout the qpitch specifies the distance in
479 mt->qpitch = mt->total_width
[all...] |
| gen8_depth_state.c | 81 OUT_BATCH(((depth - 1) << 21) | (depth_mt ? depth_mt->qpitch >> 2 : 0));
99 OUT_BATCH(depth_mt->hiz_buf->aux_base.qpitch >> 2);
132 OUT_BATCH(stencil_mt ? stencil_mt->qpitch >> 2 : 0);
|
| intel_mipmap_tree.c | 431 * used on Gen8 to make it pick a qpitch value which doesn't include space
433 * automatically pick a packed qpitch value whenever mt->first_level ==
436 * TODO: also disable this on Gen8 and pick the qpitch value like Gen9
[all...] |
| intel_mipmap_tree.h | 319 uint32_t qpitch; member in struct:intel_miptree_aux_buffer
518 uint32_t qpitch; member in struct:intel_mipmap_tree
[all...] |
| brw_state_dump.c | 308 batch_out(brw, name, offset, 1, "MOCS: 0x%x Base MIP: %.1f (%u mips) Surface QPitch: %d\n",
331 batch_out(brw, name, offset, 6, "AUX pitch: %d qpitch: %d\n",
|
| brw_fs_surface_builder.cpp | 547 * between slices of the same LOD is equal to the qpitch value
[all...] |
| /external/mesa3d/src/intel/isl/ |
| isl_surface_state.c | 185 * reason. The fix appears to be to divide qpitch by 2 for
193 /* From the Broadwell PRM for RENDER_SURFACE_STATE.QPitch
205 /* QPitch is usually expressed as rows of surface elements (where
212 * Surface QPitch specifies the distance in pixels between array
217 /* QPitch doesn't make sense for ISL_DIM_LAYOUT_GEN4_3D since it uses a
218 * different pitch at each LOD. Also, the QPitch field is ignored for
219 * these surfaces. From the Broadwell PRM documentation for QPitch:
229 * so it is safe to just set QPitch to 0.
272 * "[DevSNB] Errata: Sampler MSAA Qpitch will be 4 greater than the value
276 * Since this Qpitch errata only impacts the sampler, we have to adjust th
[all...] |
| isl.c | 374 /* QPitch becomes programmable in Broadwell. So choose the
375 * most compact QPitch possible in order to conserve memory.
378 * >> RENDER_SURFACE_STATE Surface QPitch (p325):
397 * driver more control over the QPitch.
401 /* The hardware will never use the QPitch. So choose the most
402 * compact QPitch possible in order to conserve memory.
455 /* The hardware will never use the QPitch. So choose the most
456 * compact QPitch possible in order to conserve memory.
465 /* The hardware will never use the QPitch. So choose the most
466 * compact QPitch possible in order to conserve memory
[all...] |
| /external/mesa3d/src/gallium/drivers/swr/ |
| swr_screen.cpp | 659 * | | qpitch
677 * height in rows is the qpitch. Array slices are laid out logically below
678 * one another, qpitch rows apart. For 3D surfaces, the "level" values are
682 * adjacent to each other on the X axis. The qpitch becomes the number of
717 res->swr.qpitch = util_format_get_nblocksx(fmt, width);
735 // The qpitch is controlled by either the height of the second LOD, or
748 res->swr.qpitch = util_format_get_nblocksy(fmt, height);
785 (size_t)res->swr.depth * res->swr.qpitch * res->swr.pitch;
803 res->secondary.depth * res->secondary.qpitch *
[all...] |
| swr_context.cpp | 142 pt->layer_stride = spr->swr.qpitch * spr->swr.pitch;
150 zbase = (z * spr->swr.qpitch + box->y) * spr->swr.pitch +
152 sbase = (z * spr->secondary.qpitch + box->y) * spr->secondary.pitch +
197 zbase = (z * spr->swr.qpitch + box.y) * spr->swr.pitch +
199 sbase = (z * spr->secondary.qpitch + box.y) * spr->secondary.pitch +
|
| swr_state.cpp | 742 swr->qpitch * swr->pitch;
754 jit_tex->img_stride[level] = swr->qpitch * swr->pitch;
[all...] |
| /external/mesa3d/src/gallium/drivers/ilo/core/ |
| ilo_image.c | 78 * QPitch equation applies only to the separate stencil buffer:
80 * QPitch = h_0"
742 * QPitch = (h0 + h1 + 11j)"
747 * QPitch = (h0 + h1 + 11j) / 4"
749 * "[DevSNB] Errata: Sampler MSAA Qpitch will be 4 greater than the
758 * QPitch = (h0 + h1 + 12j)
759 * QPitch = (h0 + h1 + 12j) / 4 (compressed)
763 * To access the N-th slice, an offset of (Stride * QPitch * N) is added to
764 * the base address. The PRM divides QPitch by 4 for compressed formats
765 * because the block height for those formats are 4, and it wants QPitch t
[all...] |
| ilo_builder_decode.c | 470 ilo_printf("qpitch\n");
|
| /external/mesa3d/src/intel/blorp/ |
| blorp_blit.c | [all...] |
| /external/mesa3d/docs/relnotes/ |
| 13.0.3.html | 109 <li>anv/cmd_buffer: Remove the 1-D case from the HiZ QPitch calculation</li>
|
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/core/ |
| state.h | 497 uint32_t qpitch; member in struct:SWR_SURFACE_STATE
[all...] |
| /external/mesa3d/src/intel/genxml/ |
| gen8.xml | [all...] |
| gen9.xml | [all...] |
