| /external/mesa3d/include/pci_ids/ |
| radeon_pci_ids.h | 5 CHIPSET(0x5144, RADEON_QD, R100)
6 CHIPSET(0x5145, RADEON_QE, R100)
7 CHIPSET(0x5146, RADEON_QF, R100)
8 CHIPSET(0x5147, RADEON_QG, R100)
|
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_chipset.h | 5 * r100 includes R100, RV100, RV200, RS100, RS200, RS250.
37 #define RADEON_CHIPSET_BROKEN_STENCIL (1 << 1) /* r100 stencil bug */
|
| radeon_blit.c | 89 static inline void emit_vtx_state(struct r100_context *r100)
91 BATCH_LOCALS(&r100->radeon);
94 if (r100->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
112 static void inline emit_tx_setup(struct r100_context *r100,
121 BATCH_LOCALS(&r100->radeon);
161 static inline void emit_cb_setup(struct r100_context *r100,
171 BATCH_LOCALS(&r100->radeon);
225 static GLboolean validate_buffers(struct r100_context *r100,
231 radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
233 ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs
354 struct r100_context *r100 = R100_CONTEXT(ctx); local
[all...] |
| radeon_blit.h | 31 void r100_blit_init(struct r100_context *r100);
|
| radeon_state_init.c | 207 /* need this for the cubic_map on disabled unit 2 bug, maybe r100 only? */
262 r100ContextPtr r100 = R100_CONTEXT(ctx); local
263 BATCH_LOCALS(&r100->radeon);
274 r100ContextPtr r100 = R100_CONTEXT(ctx); local
275 BATCH_LOCALS(&r100->radeon);
286 r100ContextPtr r100 = R100_CONTEXT(ctx); local
287 BATCH_LOCALS(&r100->radeon);
298 r100ContextPtr r100 = R100_CONTEXT(ctx); local
302 rrb = radeon_get_colorbuffer(&r100->radeon);
307 drb = radeon_get_depthbuffer(&r100->radeon)
320 r100ContextPtr r100 = R100_CONTEXT(ctx); local
420 r100ContextPtr r100 = R100_CONTEXT(ctx); local
457 r100ContextPtr r100 = R100_CONTEXT(ctx); local
[all...] |
| radeon_common_context.c | 58 case CHIP_FAMILY_R100: return "R100";
87 "R100",
195 * initializes all of the counter sizes to 64. The counters on r100
|
| radeon_texstate.c | 224 * textures realized with I8 and ALPHA_IN_MAP not set neither (on r100).
395 /* The R100 / RV200 only support a 1X multiplier in hardware
686 /* this seems to be a genuine (r100 only?) hw bug. Need to remove the
816 /* the r100 cannot do texgen for some coords and not for others
[all...] |
| radeon_state.c | 2108 r100ContextPtr r100 = R100_CONTEXT(ctx); local
[all...] |
| radeon_context.c | 99 /* r100 always needs to emit ZBS to avoid TCL lockups */
|
| radeon_tex.c | 175 /* r100 chips can't handle mipmaps/aniso for cubemap/volume textures */
|
| radeon_texture.c | 221 /* r100 can only do this */
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| radeon_screen.c | 73 #if defined(RADEON_R100) /* R100 */
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| radeon_swtcl.c | 57 /* R100: xyzw, c0, c1/fog, stq[0..2] = 4+1+1+3*3 = 15 right? */
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/cfi/ |
| cfi-i386.d | 165 DW_CFA_undefined: r100 \(k7\)
|
| /external/autotest/docs/ |
| user-doc.md | 497 1. We have ebuild **foo-0.0.1-r100** with **test** and would like to split
503 2. Remove **test** from foo-{0.0.1-r100,9999}; uprev foo-0.0.1-r100 (to -r101)
509 5. Add a blocker. Since bar installs files owned by foo-0.0.1-r100 and earlier,
512 RDEPEND="!<=foo-0.0.1-r100"
522 RDEPEND=">foo-0.0.1-r100"
|
| /external/mesa3d/docs/ |
| sourcetree.html | 58 <li><b>radeon</b> - driver for ATI R100
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPURegisterInfo.td | 124 def R100 : SPUVecReg<100, "$100">, DwarfRegNum<[100]>;
|
| SPURegisterInfo.cpp | 154 case SPU::R100: return 100;
210 SPU::R100, SPU::R101, SPU::R102, SPU::R103,
|
| /external/valgrind/perf/ |
| ffbench.c | 129 14.10 Dell Dimension XPS R100, Pentium II 400 MHz,
|
| fbench.c | 241 0.0351 0.0561 Dell Dimension XPS R100, Pentium II 400 MHz,
|
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_texstate.c | 496 /* DOT3 works differently on R200 than on R100. On R100, just
[all...] |
| /external/libunwind/src/ia64/ |
| regname.c | 72 "r100\0\0\0\0\0r101\0\0\0\0\0r102\0\0\0\0\0r103\0\0\0\0\0" \
|
| /external/mesa3d/docs/relnotes/ |
| 7.9.1.html | 133 <li>r100: revalidate after radeon_update_renderbuffers</li>
|
| /external/valgrind/memcheck/tests/ |
| vcpu_fbench.c | 245 0.0351 0.0561 Dell Dimension XPS R100, Pentium II 400 MHz,
|
| /external/llvm/test/Analysis/CostModel/ARM/ |
| cast.ll | 229 ; CHECK: Found an estimated cost of 16 for instruction: %r100 = fptoui <2 x double> undef to <2 x i1>
230 %r100 = fptoui <2 x double> undef to <2 x i1>
[all...] |
