Home	Sort by relevance Sort by last modified time

Full Search Definition Symbol File Path History   | | Help

    Searched full:rshrn (Results 1 - 25 of 98) sorted by null

1 2 3 4

/external/llvm/test/CodeGen/AArch64/
arm64-simd-scalar-to-vector.ll	6 ; CHECK: rshrn.8b v0, v0, #4 11 ; CHECK-FAST: rshrn.8b 16 %tmp3 = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %tmp2, i32 4) 21 declare <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16>, i32) nounwind readnone
arm64-vecFold.ll	97 ; CHECK: rshrn.8b v0, v0, #5 100 %vrshrn_n1 = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %a0, i32 5) 101 %vrshrn_n4 = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %b0, i32 6) 143 declare <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16>, i32) nounwind readnone
arm64-neon-simd-shift.ll	369 %vrshrn = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %b, i32 3) 380 %vrshrn = tail call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> %b, i32 9) 392 %vrshrn = tail call <2 x i32> @llvm.aarch64.neon.rshrn.v2i32(<2 x i64> %b, i32 19) 572 declare <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16>, i32) 574 declare <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32>, i32) 576 declare <2 x i32> @llvm.aarch64.neon.rshrn.v2i32(<2 x i64>, i32)
/frameworks/rs/cpu_ref/
rsCpuIntrinsics_advsimd_Blend.S	90 rshrn v4.8b, v0.8h, #8 92 rshrn v5.8b, v1.8h, #8 94 rshrn v6.8b, v2.8h, #8 96 rshrn v7.8b, v3.8h, #8 108 rshrn v0.8b, v0.8h, #8 110 rshrn v1.8b, v1.8h, #8 112 rshrn v2.8b, v2.8h, #8 114 rshrn v3.8b, v3.8h, #8 136 rshrn v4.8b, v8.8h, #8 138 rshrn v5.8b, v9.8h, #     [all...]
rsCpuIntrinsics_advsimd_3DLUT.S	69 rshrn v10.4h, v8.4s, #8 79 rshrn v11.4h, v8.4s, #8
/external/libhevc/common/arm64/
ihevc_intra_pred_chroma_mode_27_to_33.s	187 rshrn v10.8b, v10.8h,#5 //(i row)shift_res = vrshrn_n_u16(add_res, 5) 202 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5) 219 rshrn v18.8b, v18.8h,#5 //(iii)shift_res = vrshrn_n_u16(add_res, 5) 236 rshrn v22.8b, v22.8h,#5 //(iv)shift_res = vrshrn_n_u16(add_res, 5) 253 rshrn v10.8b, v10.8h,#5 //(v)shift_res = vrshrn_n_u16(add_res, 5) 268 rshrn v14.8b, v14.8h,#5 //(vi)shift_res = vrshrn_n_u16(add_res, 5) 302 rshrn v18.8b, v18.8h,#5 //(vii)shift_res = vrshrn_n_u16(add_res, 5) 318 rshrn v22.8b, v22.8h,#5 //(viii)shift_res = vrshrn_n_u16(add_res, 5) 332 rshrn v10.8b, v10.8h,#5 //(i)shift_res = vrshrn_n_u16(add_res, 5) 349 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5     [all...]
ihevc_intra_pred_filters_luma_mode_19_to_25.s	301 rshrn v10.8b, v10.8h,#5 //(i row)shift_res = vrshrn_n_u16(add_res, 5) 316 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5) 332 rshrn v18.8b, v18.8h,#5 //(iii)shift_res = vrshrn_n_u16(add_res, 5) 348 rshrn v22.8b, v22.8h,#5 //(iv)shift_res = vrshrn_n_u16(add_res, 5) 364 rshrn v10.8b, v10.8h,#5 //(v)shift_res = vrshrn_n_u16(add_res, 5) 379 rshrn v14.8b, v14.8h,#5 //(vi)shift_res = vrshrn_n_u16(add_res, 5) 412 rshrn v18.8b, v18.8h,#5 //(vii)shift_res = vrshrn_n_u16(add_res, 5) 432 rshrn v22.8b, v22.8h,#5 //(viii)shift_res = vrshrn_n_u16(add_res, 5) 445 rshrn v10.8b, v10.8h,#5 //(i)shift_res = vrshrn_n_u16(add_res, 5) 463 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5     [all...]
ihevc_intra_pred_luma_mode_27_to_33.s	192 rshrn v10.8b, v10.8h,#5 //(i row)shift_res = vrshrn_n_u16(add_res, 5) 207 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5) 224 rshrn v18.8b, v18.8h,#5 //(iii)shift_res = vrshrn_n_u16(add_res, 5) 241 rshrn v22.8b, v22.8h,#5 //(iv)shift_res = vrshrn_n_u16(add_res, 5) 258 rshrn v10.8b, v10.8h,#5 //(v)shift_res = vrshrn_n_u16(add_res, 5) 273 rshrn v14.8b, v14.8h,#5 //(vi)shift_res = vrshrn_n_u16(add_res, 5) 307 rshrn v18.8b, v18.8h,#5 //(vii)shift_res = vrshrn_n_u16(add_res, 5) 324 rshrn v22.8b, v22.8h,#5 //(viii)shift_res = vrshrn_n_u16(add_res, 5) 338 rshrn v10.8b, v10.8h,#5 //(i)shift_res = vrshrn_n_u16(add_res, 5) 355 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5     [all...]
ihevc_intra_pred_chroma_mode_3_to_9.s	196 rshrn v24.8b, v24.8h,#5 //round shft (row 0) 207 rshrn v22.8b, v22.8h,#5 //round shft (row 1) 218 rshrn v20.8b, v20.8h,#5 //round shft (row 2) 229 rshrn v18.8b, v18.8h,#5 //round shft (row 3) 242 rshrn v24.8b, v24.8h,#5 //round shft (row 4) 253 rshrn v22.8b, v22.8h,#5 //round shft (row 5) 264 rshrn v20.8b, v20.8h,#5 //round shft (row 6) 265 rshrn v18.8b, v18.8h,#5 //round shft (row 7) 334 rshrn v22.8b, v22.8h,#5 //round shft (row 5) 365 rshrn v20.8b, v20.8h,#5 //(from previous loop)round shft (row 6     [all...]
ihevc_intra_pred_filters_luma_mode_11_to_17.s	317 rshrn v24.8b, v24.8h,#5 //round shft (row 0) 328 rshrn v22.8b, v22.8h,#5 //round shft (row 1) 339 rshrn v20.8b, v20.8h,#5 //round shft (row 2) 350 rshrn v18.8b, v18.8h,#5 //round shft (row 3) 361 rshrn v24.8b, v24.8h,#5 //round shft (row 4) 372 rshrn v22.8b, v22.8h,#5 //round shft (row 5) 383 rshrn v20.8b, v20.8h,#5 //round shft (row 6) 384 rshrn v18.8b, v18.8h,#5 //round shft (row 7) 449 rshrn v24.8b, v22.8h,#5 //round shft (row 5) 471 rshrn v20.8b, v20.8h,#5 //(from previous loop)round shft (row 6     [all...]
ihevc_intra_pred_luma_mode_3_to_9.s	197 rshrn v24.8b, v24.8h,#5 //round shft (row 0) 208 rshrn v22.8b, v22.8h,#5 //round shft (row 1) 219 rshrn v20.8b, v20.8h,#5 //round shft (row 2) 230 rshrn v18.8b, v18.8h,#5 //round shft (row 3) 241 rshrn v24.8b, v24.8h,#5 //round shft (row 4) 252 rshrn v22.8b, v22.8h,#5 //round shft (row 5) 263 rshrn v20.8b, v20.8h,#5 //round shft (row 6) 264 rshrn v18.8b, v18.8h,#5 //round shft (row 7) 329 rshrn v22.8b, v22.8h,#5 //round shft (row 5) 351 rshrn v20.8b, v20.8h,#5 //(from previous loop)round shft (row 6     [all...]
ihevc_intra_pred_filters_chroma_mode_19_to_25.s	298 rshrn v23.8b, v23.8h,#5 //(i row)shift_res = vrshrn_n_u16(add_res, 5) 313 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5) 329 rshrn v18.8b, v18.8h,#5 //(iii)shift_res = vrshrn_n_u16(add_res, 5) 345 rshrn v22.8b, v22.8h,#5 //(iv)shift_res = vrshrn_n_u16(add_res, 5) 364 rshrn v23.8b, v23.8h,#5 //(v)shift_res = vrshrn_n_u16(add_res, 5) 379 rshrn v14.8b, v14.8h,#5 //(vi)shift_res = vrshrn_n_u16(add_res, 5) 413 rshrn v18.8b, v18.8h,#5 //(vii)shift_res = vrshrn_n_u16(add_res, 5) 432 rshrn v22.8b, v22.8h,#5 //(viii)shift_res = vrshrn_n_u16(add_res, 5) 445 rshrn v23.8b, v23.8h,#5 //(i)shift_res = vrshrn_n_u16(add_res, 5) 464 rshrn v14.8b, v14.8h,#5 //(ii)shift_res = vrshrn_n_u16(add_res, 5     [all...]
ihevc_intra_pred_filters_chroma_mode_11_to_17.s	318 rshrn v24.8b, v24.8h,#5 //round shft (row 0) 329 rshrn v22.8b, v22.8h,#5 //round shft (row 1) 340 rshrn v20.8b, v20.8h,#5 //round shft (row 2) 351 rshrn v18.8b, v18.8h,#5 //round shft (row 3) 364 rshrn v24.8b, v24.8h,#5 //round shft (row 4) 375 rshrn v22.8b, v22.8h,#5 //round shft (row 5) 386 rshrn v20.8b, v20.8h,#5 //round shft (row 6) 387 rshrn v18.8b, v18.8h,#5 //round shft (row 7) 459 rshrn v24.8b, v22.8h,#5 //round shft (row 5) 489 rshrn v20.8b, v20.8h,#5 //(from previous loop)round shft (row 6     [all...]
ihevc_deblk_luma_horz.s	229 rshrn v20.8b, v12.8h,#3 243 rshrn v21.8b, v14.8h,#2 272 rshrn v19.8b, v16.8h,#3 305 rshrn v20.8b, v12.8h,#3 315 rshrn v21.8b, v14.8h,#2 421 rshrn v19.8b, v16.8h,#3 528 rshrn v14.8b, v14.8h,#1 561 rshrn v14.8b, v14.8h,#1
ihevc_deblk_luma_vert.s	225 rshrn v22.8b,v20.8h,#3 238 rshrn v20.8b,v20.8h,#3 240 rshrn v0.8b,v0.8h,#2 289 rshrn v26.8b,v26.8h,#3 422 rshrn v2.8b,v16.8h,#2 433 rshrn v0.8b,v0.8h,#3
/external/libavc/common/armv8/
ih264_intra_pred_chroma_av8.s	142 rshrn v5.8b, v0.8h, #2 144 rshrn v6.8b, v3.8h, #2 147 rshrn v1.8b, v1.8h, #3 151 rshrn v0.8b, v0.8h, #3 163 rshrn v0.8b, v0.8h, #2 164 rshrn v1.8b, v1.8h, #2 178 rshrn v0.8b, v0.8h, #2 179 rshrn v1.8b, v1.8h, #2 459 rshrn v10.4h, v22.4s, #6 460 rshrn v12.4h, v24.4s, #     [all...]
ih264_deblk_luma_av8.s	293 rshrn v12.8b, v16.8h, #3 //(2*(p0+q0+q1)+q2 +p1 +4)>> 3 L [q0'] 294 rshrn v13.8b, v0.8h, #3 //(2*(p0+q0+q1)+q2 +p1 +4)>> 3 H [q0'] 303 rshrn v16.8b, v16.8h, #2 //(2*q1+q0+p1+2)>>2 L [q0"] 304 rshrn v17.8b, v0.8h, #2 //(2*q1+q0+p1+2)>>2 H [q0"] 314 rshrn v12.8b, v28.8h, #2 //(p0+q0+q1+q2+2)>>2 L [q1'] 315 rshrn v13.8b, v30.8h, #2 //(p0+q0+q1+q2+2)>>2 H [q1'] 326 rshrn v0.8b, v28.8h, #3 //(p0+q0+q1+3*q2+2*q3+4)>>3 L [q2'] 327 rshrn v1.8b, v30.8h, #3 //(p0+q0+q1+3*q2+2*q3+4)>>3 H [q2'] 348 rshrn v28.8b, v28.8h, #3 //(2*(p0+q0+p1)+p2+q1+4)>>3 L,p0' 349 rshrn v29.8b, v4.8h, #3 //(2*(p0+q0+p1)+p2+q1+4)>>3 H,p0     [all...]
ih264_deblk_chroma_av8.s	124 rshrn v8.8b, v8.8h, #2 // 125 rshrn v9.8b, v10.8h, #2 //Q4 = (X2(q1U) + q0U + p1U + 2) >> 2 128 rshrn v10.8b, v14.8h, #2 // 129 rshrn v11.8b, v28.8h, #2 //Q5 = (X2(p1U) + p0U + q1U + 2) >> 2 242 rshrn v14.8b, v14.8h, #2 243 rshrn v15.8b, v16.8h, #2 //(2*p1 + (p0 + q1) + 2) >> 2 246 rshrn v18.8b, v18.8h, #2 247 rshrn v19.8b, v20.8h, #2 //(2*q1 + (p1 + q0) + 2) >> 2
/external/libavc/encoder/armv8/
ih264e_evaluate_intra_chroma_modes_av8.s	129 rshrn v5.8b, v0.8h, #2 131 rshrn v6.8b, v3.8h, #2 134 rshrn v1.8b, v1.8h, #3 138 rshrn v0.8b, v0.8h, #3 154 rshrn v0.8b, v0.8h, #2 155 rshrn v1.8b, v1.8h, #2 172 rshrn v0.8b, v0.8h, #2 173 rshrn v1.8b, v1.8h, #2
/external/libjpeg-turbo/simd/
jsimd_arm64_neon.S	528 rshrn v2.4h, v18.4s, #(CONST_BITS-PASS1_BITS) /* wsptr[DCTSIZE*0] = (int) DESCALE(tmp10 + tmp3, CONST_BITS-PASS1_BITS) */ 529 rshrn v3.4h, v22.4s, #(CONST_BITS-PASS1_BITS) /* wsptr[DCTSIZE*1] = (int) DESCALE(tmp11 + tmp2, CONST_BITS-PASS1_BITS) */ 530 rshrn v4.4h, v26.4s, #(CONST_BITS-PASS1_BITS) /* wsptr[DCTSIZE*2] = (int) DESCALE(tmp12 + tmp1, CONST_BITS-PASS1_BITS) */ 531 rshrn v5.4h, v14.4s, #(CONST_BITS-PASS1_BITS) /* wsptr[DCTSIZE*3] = (int) DESCALE(tmp13 + tmp0, CONST_BITS-PASS1_BITS) */ 612 rshrn v6.4h, v19.4s, #(CONST_BITS-PASS1_BITS) /* wsptr[DCTSIZE*0] = (int) DESCALE(tmp10 + tmp (…)     [all...]
/external/libvpx/libvpx/third_party/libyuv/source/
scale_neon64.cc	53 "rshrn v0.8b, v0.8h, #1 \n" // downshift, round and pack 82 "rshrn v0.8b, v0.8h, #2 \n" // downshift, round and pack 135 "rshrn v0.8b, v0.8h, #4 \n" // divide by 16 w/rounding 629 "rshrn v6.4h, v16.4s, #16 \n" 684 "rshrn v0.8b, v6.8h, #8 \n" 790 "rshrn v0.8b, v0.8h, #1 \n" // downshift, round and pack 791 "rshrn v1.8b, v1.8h, #1 \n" 792 "rshrn v2.8b, v2.8h, #1 \n" 793 "rshrn v3.8b, v3.8h, #1 \n"     [all...]
/external/libyuv/files/source/
scale_neon64.cc	59 "rshrn v0.8b, v0.8h, #1 \n" // downshift, round and pack 90 "rshrn v0.8b, v0.8h, #2 \n" // downshift, round and pack 148 "rshrn v0.8b, v0.8h, #4 \n" // divide by 16 w/rounding 659 "rshrn v6.4h, v16.4s, #16 \n" 716 "rshrn v0.8b, v6.8h, #8 \n" 828 "rshrn v0.8b, v0.8h, #1 \n" // downshift, round and pac     [all...]
/external/libmpeg2/common/armv8/
impeg2_inter_pred.s	526 rshrn v18.8b, v18.8h, #2 //row1 528 rshrn v26.8b, v26.8h, #2 //row5 530 rshrn v20.8b, v20.8h, #2 //row2 532 rshrn v28.8b, v28.8h, #2 //row6 552 rshrn v22.8b, v22.8h, #2 //row3 554 rshrn v30.8b, v30.8h, #2 //row7 556 rshrn v24.8b, v24.8h, #2 //row4 558 rshrn v14.8b, v14.8h, #2 //row8
/external/capstone/suite/MC/AArch64/
neon-simd-shift.s.cs	104 0x20,0x8c,0x0d,0x0f = rshrn v0.8b, v1.8h, #3 105 0x20,0x8c,0x1d,0x0f = rshrn v0.4h, v1.4s, #3 106 0x20,0x8c,0x3d,0x0f = rshrn v0.2s, v1.2d, #3
/external/llvm/test/MC/AArch64/
neon-simd-shift.s	296 rshrn v0.8b, v1.8h, #3 297 rshrn v0.4h, v1.4s, #3 298 rshrn v0.2s, v1.2d, #3 303 // CHECK: rshrn v0.8b, v1.8h, #3 // encoding: [0x20,0x8c,0x0d,0x0f] 304 // CHECK: rshrn v0.4h, v1.4s, #3 // encoding: [0x20,0x8c,0x1d,0x0f] 305 // CHECK: rshrn v0.2s, v1.2d, #3 // encoding: [0x20,0x8c,0x3d,0x0f]

Completed in 1694 milliseconds

1 2 3 4