/device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
SdramSpd.h | 2 This file contains definitions for the SPD fields on an SDRAM.
22 // SDRAM SPD field definitions
54 #define SPD_VAL_SDR_TYPE 4 ///< SDR SDRAM memory
55 #define SPD_VAL_DDR_TYPE 7 ///< DDR SDRAM memory
56 #define SPD_VAL_DDR2_TYPE 8 ///< DDR2 SDRAM memory
57 #define SPD_VAL_DDR3_TYPE 11 ///< DDR3 SDRAM memory
58 #define SPD_VAL_DDR4_TYPE 12 ///< DDR4 SDRAM memory
59 #define SPD_VAL_LPDDR3_TYPE 15 ///< LPDDR3 SDRAM memory
60 #define SPD_VAL_LPDDR4_TYPE 16 ///< LPDDR4 SDRAM memory
|
SdramSpdLpDdr.h | 14 - Serial Presence Detect (SPD) for LPDDR3 and LPDDR4 SDRAM Modules Document Release 2
389 SPD_LPDDR_SDRAM_DENSITY_BANKS_STRUCT SdramDensityAndBanks; ///< 4 SDRAM Density and Banks
390 SPD_LPDDR_SDRAM_ADDRESSING_STRUCT SdramAddressing; ///< 5 SDRAM Addressing
391 SPD_LPDDR_SDRAM_PACKAGE_TYPE_STRUCT SdramPackageType; ///< 6 SDRAM Package Type
392 SPD_LPDDR_SDRAM_OPTIONAL_FEATURES_STRUCT SdramOptionalFeatures; ///< 7 SDRAM Optional Features
393 SPD_LPDDR_SDRAM_THERMAL_REFRESH_STRUCT ThermalAndRefreshOptions; ///< 8 SDRAM Thermal and Refresh Options
394 SPD_LPDDR_OTHER_SDRAM_OPTIONAL_FEATURES_STRUCT OtherOptionalFeatures; ///< 9 Other SDRAM Optional Features
403 SPD_LPDDR_TCK_MIN_MTB_STRUCT tCKmin; ///< 18 SDRAM Minimum Cycle Time (tCKmin)
404 SPD_LPDDR_TCK_MAX_MTB_STRUCT tCKmax; ///< 19 SDRAM Maximum Cycle Time (tCKmax)
414 SPD_LPDDR_CONNECTOR_BIT_MAPPING_BYTE_STRUCT BitMapping[77 - 60 + 1]; ///< 60-77 Connector to SDRAM Bit Mapping [all...] |
SdramSpdDdr4.h | 14 - Serial Presence Detect (SPD) for DDR4 SDRAM Modules Document Release 4
791 SPD4_SDRAM_DENSITY_BANKS_STRUCT SdramDensityAndBanks; ///< 4 SDRAM Density and Banks
792 SPD4_SDRAM_ADDRESSING_STRUCT SdramAddressing; ///< 5 SDRAM Addressing
793 SPD4_PRIMARY_SDRAM_PACKAGE_TYPE_STRUCT PrimarySdramPackageType; ///< 6 Primary SDRAM Package Type
794 SPD4_SDRAM_OPTIONAL_FEATURES_STRUCT SdramOptionalFeatures; ///< 7 SDRAM Optional Features
795 SPD4_SDRAM_THERMAL_REFRESH_STRUCT ThermalAndRefreshOptions; ///< 8 SDRAM Thermal and Refresh Options
796 SPD4_OTHER_SDRAM_OPTIONAL_FEATURES_STRUCT OtherOptionalFeatures; ///< 9 Other SDRAM Optional Features
797 SPD4_SECONDARY_SDRAM_PACKAGE_TYPE_STRUCT SecondarySdramPackageType;///< 10 Secondary SDRAM Package Type
805 SPD4_TCK_MIN_MTB_STRUCT tCKmin; ///< 18 SDRAM Minimum Cycle Time (tCKmin)
806 SPD4_TCK_MAX_MTB_STRUCT tCKmax; ///< 19 SDRAM Maximum Cycle Time (tCKmax) [all...] |
SdramSpdDdr3.h | 14 - Serial Presence Detect (SPD) for DDR3 SDRAM Modules Document Release 6
622 SPD3_SDRAM_DENSITY_BANKS_STRUCT SdramDensityAndBanks; ///< 4 SDRAM Density and Banks
623 SPD3_SDRAM_ADDRESSING_STRUCT SdramAddressing; ///< 5 SDRAM Addressing
629 SPD3_TCK_MIN_MTB_STRUCT tCKmin; ///< 12 SDRAM Minimum Cycle Time (tCKmin)
645 SPD3_SDRAM_OPTIONAL_FEATURES_STRUCT SdramOptionalFeatures; ///< 30 SDRAM Optional Features
646 SPD3_SDRAM_THERMAL_REFRESH_STRUCT ThermalAndRefreshOptions; ///< 31 SDRAM Thermal And Refresh Options
648 SPD3_SDRAM_DEVICE_TYPE_STRUCT SdramDeviceType; ///< 33 SDRAM Device Type
649 SPD3_TCK_MIN_FTB_STRUCT tCKminFine; ///< 34 Fine Offset for SDRAM Minimum Cycle Time (tCKmin)
655 SPD3_MAXIMUM_ACTIVE_COUNT_STRUCT MacValue; ///< 41 SDRAM Maximum Active Count (MAC) Value
[all...] |
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/ |
SdramSpd.h | 18 This file contains definitions for the SPD fields on an SDRAM.
26 // SDRAM SPD field definitions
58 #define SPD_VAL_SDR_TYPE 4 // SDR SDRAM memory
59 #define SPD_VAL_DDR_TYPE 7 // DDR SDRAM memory
60 #define SPD_VAL_DDR2_TYPE 8 // DDR2 SDRAM memory
|
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/ |
MemoryInit.h | 2 Framework PEIM to initialize memory on an DDR2 SDRAM Memory Controller.
|
MemoryInit.c | 35 Do memory initialization for QuarkNcSocId DDR3 SDRAM Controller
|
/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Include/Library/ |
HwMemInitLib.h | 548 #define SPD_TYPE_DDR3 0x0B // DDR3 SDRAM
549 #define SPD_TYPE_DDR4 0x0C // DDR4 SDRAM
564 #define SPD_SDRAM_BANKS 4 // SDRAM Density and number of internal banks
565 #define SPD_1Gb 2 // Total SDRAM Capacity 1 Gigabits
566 #define SPD_2Gb 3 // Total SDRAM Capacity 2 Gigabits
567 #define SPD_4Gb 4 // Total SDRAM Capacity 4 Gigabits
568 #define SPD_8Gb 5 // Total SDRAM Capacity 8 Gigabits
569 #define SPD_16Gb 6 // Total SDRAM Capacity 16 Gigabits
570 #define SPD_32Gb 7 // Total SDRAM Capacity 32 Gigabits
587 #define SPD_MODULE_ORG_DDR3 7 // Number of Ranks and SDRAM device width [all...] |
/external/autotest/client/site_tests/hardware_MemoryTotalSize/ |
hardware_MemoryTotalSize.py | 21 # x86 and ARM SDRAM configurations differ significantly from each other.
|
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
BlackfinSubtarget.cpp | 27 : BlackfinGenSubtargetInfo(TT, CPU, FS), sdram(false),
|
BlackfinSubtarget.h | 27 bool sdram; member in class:llvm::BlackfinSubtarget
|
Blackfin.td | 23 def FeatureSDRAM : SubtargetFeature<"sdram", "sdram", "true", 24 "Build for SDRAM">;
|
README.txt | 243 | -msdram | Build for SDRAM |
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/ |
dram_spec_timing.h | 245 /* 0:S2 or S4 SDRAM, 1:NVM */ 305 /* MR16 (PASR Bank Mask), S2 SDRAM Only */ 390 /* SDRAM Low temperature operating limit exceeded */ 398 /* SDRAM High temperature operating limit exceeded */
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/ |
pmu.c | 285 /* TODO: support the sdram save for rk3368 SoCs*/ 290 /* TODO: support the sdram restore for rk3368 SoCs */
|
/external/syslinux/com32/gpllib/dmi/ |
dmi_memory.c | 122 "SDRAM", 195 "SDRAM" /* 10 */
|
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
MrcWrapper.h | 2 Framework PEIM to initialize memory on an DDR2 SDRAM Memory Controller.
|
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
DdrMemoryController.h | 59 // Maximum number of SDRAM channels supported by the memory controller
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/ |
pmu.c | 125 /* TODO: support the sdram save for rk3328 SoCs*/ 130 /* TODO: support the sdram restore for rk3328 SoCs */
|
/external/autotest/client/site_tests/kernel_fs_Punybench/ |
kernel_fs_Punybench.py | 130 SDRAM: 153 self._get_mib_s('SDRAM', result)})
|
/device/linaro/bootloader/arm-trusted-firmware/docs/plat/ |
poplar.rst | 16 DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB
|
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Framework/Guid/DataHubRecords/ |
DataHubSubClassMemory.h | 305 UINT16 SDRAM :1;
|
/external/libmtp/src/ |
ptp.h | 481 * sdram=1, card=0 [all...] |
/external/syslinux/bios/com32/gpllib/ |
libgpl.c32 | |
/external/syslinux/efi32/com32/gpllib/ |
libgpl.c32 | |