| /external/valgrind/none/tests/amd64/ |
| aes.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-sse42
|
| crc32.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-sse42
|
| pcmpstr64.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-sse42
|
| pcmpstr64w.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-sse42
|
| pcmpxstrx64.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-sse42
|
| pcmpxstrx64w.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-sse42
|
| sse4-64.vgtest | 2 prereq: ../../../tests/x86_amd64_features amd64-sse42
|
| /external/swiftshader/third_party/LLVM/test/Bitcode/ |
| sse42_crc32.ll | 9 ; CHECK: i32 @llvm.x86.sse42.crc32.32.8(
10 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.8(
13 ; CHECK: i32 @llvm.x86.sse42.crc32.32.16(
14 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.16(
17 ; CHECK: i32 @llvm.x86.sse42.crc32.32.32(
18 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.32(
21 ; CHECK: i64 @llvm.x86.sse42.crc32.64.8(
22 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.8(
25 ; CHECK: i64 @llvm.x86.sse42.crc32.64.64(
26 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.64
[all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| vec_compare-sse4.ll | 2 ; RUN: llc < %s -march=x86 -mattr=-sse42,+sse41 | FileCheck %s -check-prefix=SSE41
3 ; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s -check-prefix=SSE42
6 ; SSE42: test1:
7 ; SSE42: pcmpgtq
8 ; SSE42: ret
22 ; SSE42: test2:
23 ; SSE42: pcmpeqq
24 ; SSE42: ret
|
| sse42_64.ll | 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
3 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind
4 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind
7 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b)
15 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
|
| sse42.ll | 1 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
4 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind
5 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind
6 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
9 %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
20 %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
31 %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
|
| /external/skia/src/opts/ |
| SkOpts_sse42.cpp | 10 #define SK_OPTS_NS sse42
15 hash_fn = sse42::hash_fn;
|
| /external/skqp/src/opts/ |
| SkOpts_sse42.cpp | 10 #define SK_OPTS_NS sse42
15 hash_fn = sse42::hash_fn;
|
| /external/llvm/test/Transforms/InstCombine/ |
| x86-crc32-demanded.ll | 9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64
12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind
17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| x86-crc32-demanded.ll | 9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64
12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind
17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
|
| /external/llvm/test/CodeGen/X86/ |
| widen_conv-3.ll | 3 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE42
5 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE42
22 ; X86-SSE42-LABEL: convert_v2i16_to_v2f32:
23 ; X86-SSE42: # BB#0: # %entry
24 ; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
25 ; X86-SSE42-NEXT: psllq $48, %xmm0
26 ; X86-SSE42-NEXT: psrad $16, %xmm0
27 ; X86-SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
28 ; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
29 ; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax
[all...] |
| sse42_64.ll | 3 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind
4 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind
7 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b)
15 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
|
| widen_conv-4.ll | 3 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE42
5 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE42
28 ; X86-SSE42-LABEL: convert_v7i16_v7f32:
29 ; X86-SSE42: # BB#0: # %entry
30 ; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
31 ; X86-SSE42-NEXT: pxor %xmm1, %xmm1
32 ; X86-SSE42-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
33 ; X86-SSE42-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
34 ; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
35 ; X86-SSE42-NEXT: cvtdq2ps %xmm2, %xmm
[all...] |
| vector-compare-results.ll | 3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
58 ; SSE42-LABEL: test_cmp_v2i64:
59 ; SSE42: # BB#0:
60 ; SSE42-NEXT: pcmpgtq %xmm1, %xmm0
61 ; SSE42-NEXT: retq
127 ; SSE42-LABEL: test_cmp_v4f64:
128 ; SSE42: # BB#0:
129 ; SSE42-NEXT: cmpltpd %xmm1, %xmm3
130 ; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,1,0,2]
131 ; SSE42-NEXT: cmpltpd %xmm0, %xmm
[all...] |
| sse42-intrinsics-fast-isel-x86_64.ll | 4 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
12 %res = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a0, i8 %a1)
15 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind readnone
23 %res = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a0, i64 %a1)
26 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
|
| vec_compare-sse4.ll | 4 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
37 ; SSE42-LABEL: test1:
38 ; SSE42: ## BB#0:
39 ; SSE42-NEXT: pcmpgtq %xmm1, %xmm0
40 ; SSE42-NEXT: retl
59 ; SSE42-LABEL: test2:
60 ; SSE42: ## BB#0:
61 ; SSE42-NEXT: pcmpeqq %xmm1, %xmm0
62 ; SSE42-NEXT: retl
|
| sse42.ll | 5 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind
6 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind
7 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
21 %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
38 %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
55 %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
|
| sse42-intrinsics-x86.ll | 12 %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
15 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
31 %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; <i32> [#uses=1]
48 %res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
51 declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
63 %res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
66 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
81 %res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1]
84 declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
99 %res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1
[all...] |
| /external/clang/test/CodeGen/ |
| sse42-builtins.c | 9 // NOTE: This should match the tests in llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
13 // CHECK: call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %{{.*}}, i32 %{{.*}}, <16 x i8> %{{.*}}, i32 %{{.*}}, i8 7)
19 // CHECK: call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %{{.*}}, i32 %{{.*}}, <16 x i8> %{{.*}}, i32 %{{.*}}, i8 7)
25 // CHECK: call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %{{.*}}, i32 %{{.*}}, <16 x i8> %{{.*}}, i32 %{{.*}}, i8 7)
31 // CHECK: call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %{{.*}}, i32 %{{.*}}, <16 x i8> %{{.*}}, i32 %{{.*}}, i8 7)
37 // CHECK: call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %{{.*}}, i32 %{{.*}}, <16 x i8> %{{.*}}, i32 %{{.*}}, i8 7)
43 // CHECK: call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %{{.*}}, i32 %{{.*}}, <16 x i8> %{{.*}}, i32 %{{.*}}, i8 7)
49 // CHECK: call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %{{.*}}, i32 %{{.*}}, <16 x i8> %{{.*}}, i32 %{{.*}}, i8 7)
61 // CHECK: call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %{{.*}}, <16 x i8> %{{.*}}, i8 7)
67 // CHECK: call i32 @llvm.x86.sse42.pcmpistric128(<16 x i8> %{{.*}}, <16 x i8> %{{.*}}, i8 7
[all...] |
| /external/llvm/test/Analysis/CostModel/X86/ |
| arith.ll | 2 ; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42
12 ; SSE42: cost of 1 {{.*}} %A = add
17 ; SSE42: cost of 2 {{.*}} %B = add
22 ; SSE42: cost of 1 {{.*}} %C = add
27 ; SSE42: cost of 2 {{.*}} %D = add
32 ; SSE42: cost of 4 {{.*}} %E = add
42 ; SSE42: cost of 1 {{.*}} %A = xor
47 ; SSE42: cost of 2 {{.*}} %B = xor
52 ; SSE42: cost of 1 {{.*}} %C = xor
57 ; SSE42: cost of 2 {{.*}} %D = xo
[all...] |
