| /external/llvm/test/CodeGen/XCore/ |
| unaligned_store.ll | 14 ; CHECK: st16
15 ; CHECK: st16
|
| atomic.ll | 55 ; CHECK-NEXT: st16 r3, r[[R1]][r[[R2]]]
68 ; CHECK-NEXT: st16 r5, r[[R1]][r[[R2]]]
80 ; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]]
|
| store.ll | 24 ; CHECK: st16 r2, r0[r1]
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/ia64/ |
| pseudo.s | 13 st16 [r0] = r0
|
| psn.s | 123 st16 [ r65 ] = r93
124 st16 [ r65 ] = r93
125 st16.d1 [ r65 ] = r93
126 st16.nt1 [ r65 ] = r93
127 st16.d2 [ r65 ] = r93
128 st16.nt2 [ r65 ] = r93
129 st16.nta [ r65 ] = r93
130 st16.d3 [ r65 ] = r93
131 st16.d4 [ r65 ] = r93
132 st16.d5 [ r65 ] = r9
[all...] |
| pseudo.d | 25 [[:space:]]*[[:xdigit:]]*:[[:space:][:xdigit:]]+(\[[[:upper:]]+\])?[[:space:]]+st16 \[r0\]=r0,ar\.csd
|
| psn.d | 145 2d0: 08 00 74 83 81 11 \[MMI\] st16 \[r65\]=r93,ar.csd
146 2d6: 00 e8 06 03 23 00 st16 \[r65\]=r93,ar.csd
148 2e0: 08 00 74 83 83 11 \[MMI\] st16.d1 \[r65\]=r93,ar.csd
149 2e6: 00 e8 06 07 23 00 st16.d1 \[r65\]=r93,ar.csd
151 2f0: 08 00 74 83 85 11 \[MMI\] st16.d2 \[r65\]=r93,ar.csd
152 2f6: 00 e8 06 0b 23 00 st16.d2 \[r65\]=r93,ar.csd
154 300: 08 00 74 83 87 11 \[MMI\] st16.nta \[r65\]=r93,ar.csd
155 306: 00 e8 06 0f 23 00 st16.nta \[r65\]=r93,ar.csd
157 310: 08 00 76 83 81 11 \[MMI\] st16.d4 \[r65\]=r93,ar.csd
158 316: 00 ec 06 07 23 00 st16.d5 \[r65\]=r93,ar.cs
[all...] |
| opc-m.s | 1033 st16 [r4] = r5, ar25
1034 st16.nta [r4] = r5, ar.csd
1036 st16.rel [r4] = r5, ar.csd
1037 st16.rel.nta [r4] = r5, ar.csd
|
| opc-m.d | [all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/XCore/ |
| unaligned_store.ll | 3 ; RUN: grep st16 %t1.s | count 2
|
| store.ll | 6 ; RUN: grep "st16" %t1.s | count 1
|
| /external/syslinux/com32/lib/syslinux/ |
| shuffle_rm.c | 51 #define ST16(P,V) \
65 ST16(P, 0xc08e + ((R) << 8) + ((S) << 11))
69 ST16(P, V); \
73 ST16(P, 0xb866 + ((R) << 8)); \
142 ST16(p, off); /* Offset */
143 ST16(p, regstub >> 4); /* Segment */
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| ia64-opc-m.c | [all...] |
| ia64-ic.tbl | 249 st; st1, st2, st4, st8, st8.spill, st16
|
| ia64-raw.tbl | 7 AR[CSD]; ld16, IC:mov-to-AR-CSD; br.ia, cmp8xchg16, IC:mov-from-AR-CSD, st16; impliedF
|
| ChangeLog-2005 | [all...] |
| ChangeLog-0203 | 964 * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
[all...] |
| /toolchain/binutils/binutils-2.27/include/elf/ |
| aarch64.h | 97 /* LD/ST16: (S+A) & 0xffe */
273 /* LD/ST16: (S+A) & 0xffe */
|
| /external/llvm/test/MC/Disassembler/XCore/ |
| xcore.txt | 400 # CHECK: st16 r5, r3[r8]
|
| /device/linaro/bootloader/edk2/BaseTools/Source/C/VfrCompile/Pccts/dlg/ |
| dlg_a.c | 691 static DfaState st16[42] = {
variable
1249 st16,
|
| /external/capstone/arch/XCore/ |
| XCoreMapping.c | 1508 { XCORE_INS_ST16, "st16" },
|
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.td | 486 "st16 $val, $addr[$offset]", []>;
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| XCoreInstrInfo.td | 487 "st16 $val, $addr[$offset]",
[all...] |
| /device/linaro/bootloader/edk2/BaseTools/Source/C/VfrCompile/Pccts/antlr/ |
| scan.c | 2015 static DfaState st16[60] = { variable
[all...] |
| /toolchain/binutils/binutils-2.27/bfd/ |
| elfnn-aarch64.c | 772 /* LD/ST16: (S+A) & 0xffe */
[all...] |
