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  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/
armv8-a-bad.s 46 stlexh r1, pc, [r0]
47 stlexh r1, r0, [pc]
48 stlexh pc, r0, [r1]
49 stlexh r0, r0, [r1]
50 stlexh r0, r1, [r0]
76 stlexh r1, pc, [r0]
77 stlexh r1, r0, [pc]
78 stlexh pc, r0, [r1]
79 stlexh r0, r0, [r1]
80 stlexh r0, r1, [r0
    [all...]
armv8-a.s 23 stlexh r0, r1, [r14]
24 stlexh r1, r14, [r0]
25 stlexh r14, r0, [r1]
77 stlexh r0, r1, [r14]
78 stlexh r1, r14, [r0]
79 stlexh r14, r0, [r1]
archv8m.s 44 stlexh r0, r1, [r2] label
armv8-a-bad.l 26 .*:46: Error: r15 not allowed here -- `stlexh r1,pc,\[r0\]'
27 .*:47: Error: r15 not allowed here -- `stlexh r1,r0,\[pc\]'
28 .*:48: Error: r15 not allowed here -- `stlexh pc,r0,\[r1\]'
29 .*:49: Error: registers may not be the same -- `stlexh r0,r0,\[r1\]'
30 .*:50: Error: registers may not be the same -- `stlexh r0,r1,\[r0\]'
53 .*:76: Error: r15 not allowed here -- `stlexh r1,pc,\[r0\]'
54 .*:77: Error: r15 not allowed here -- `stlexh r1,r0,\[pc\]'
55 .*:78: Error: r15 not allowed here -- `stlexh pc,r0,\[r1\]'
56 .*:79: Error: registers may not be the same -- `stlexh r0,r0,\[r1\]'
57 .*:80: Error: registers may not be the same -- `stlexh r0,r1,\[r0\]
    [all...]
armv8-a.d 23 0[0-9a-f]+ <[^>]+> e1ee0e91 stlexh r0, r1, \[lr\]
24 0[0-9a-f]+ <[^>]+> e1e01e9e stlexh r1, lr, \[r0\]
25 0[0-9a-f]+ <[^>]+> e1e1ee90 stlexh lr, r0, \[r1\]
73 0[0-9a-f]+ <[^>]+> e8ce 1fd0 stlexh r0, r1, \[lr\]
74 0[0-9a-f]+ <[^>]+> e8c0 efd1 stlexh r1, lr, \[r0\]
75 0[0-9a-f]+ <[^>]+> e8c1 0fde stlexh lr, r0, \[r1\]
archv8m-base.d 47 0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
archv8m-main-dsp-1.d 47 0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
archv8m-main.d 47 0+.* <[^>]*> e8c2 1fd0 stlexh r0, r1, \[r2\]
  /external/capstone/suite/MC/ARM/
load-store-acquire-release-v8-thumb.s.cs 7 0xc5,0xe8,0xd4,0x2f = stlexh r4, r2, [r5]
load-store-acquire-release-v8.s.cs 7 0x92,0x4e,0xe5,0xe1 = stlexh r4, r2, [r5]
  /external/llvm/test/MC/ARM/
load-store-acquire-release-v8-thumb.s 18 stlexh r4, r2, [r5]
22 @ CHECK: stlexh r4, r2, [r5] @ encoding: [0xc5,0xe8,0xd4,0x2f]
load-store-acquire-release-v8.s 18 stlexh r4, r2, [r5]
22 @ CHECK: stlexh r4, r2, [r5] @ encoding: [0x92,0x4e,0xe5,0xe1]
thumbv8m.s 135 // CHECK: stlexh r1, r2, [r3] @ encoding: [0xc3,0xe8,0xd1,0x2f]
136 stlexh r1, r2, [r3] label
  /external/llvm/test/MC/Disassembler/ARM/
load-store-acquire-release-v8-thumb.txt 17 # CHECK: stlexh r4, r2, [r5] @ encoding: [0xc5,0xe8,0xd4,0x2f]
load-store-acquire-release-v8.txt 16 # CHECK: stlexh r4, r2, [r5] @ encoding: [0x92,0x4e,0xe5,0xe1]
  /external/valgrind/none/tests/arm/
v8memory_a.c 147 MEM_TEST("clrex; stlexh r9, r3, [r10]")
157 MEM_TEST("ldaexh r2, [r10] ; stlexh r9, r3, [r10]")
v8memory_t.c 147 MEM_TEST("clrex; stlexh r9, r3, [r10]")
157 MEM_TEST("ldaexh r2, [r10] ; stlexh r9, r3, [r10]")
v8memory_a.stdout.exp 189 clrex; stlexh r9, r3, [r10] with r10 = middle_of_block
251 ldaexh r2, [r10] ; stlexh r9, r3, [r10] with r10 = middle_of_block
v8memory_t.stdout.exp 189 clrex; stlexh r9, r3, [r10] with r10 = middle_of_block
251 ldaexh r2, [r10] ; stlexh r9, r3, [r10] with r10 = middle_of_block
  /external/llvm/test/CodeGen/ARM/
ldaex-stlex.ll 76 ; CHECK: stlexh r0, r1, [r2]
atomic-ops-v8.ll 143 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
431 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
525 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
622 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]
    [all...]
  /external/vixl/src/aarch32/
constants-aarch32.cc 402 return "stlexh";
  /prebuilts/vndk/v27/arm/arch-arm-armv7-a-neon/shared/vndk-core/
libvixl-arm.so 
  /prebuilts/vndk/v27/arm64/arch-arm-armv7-a-neon/shared/vndk-core/
libvixl-arm.so 
  /prebuilts/vndk/v27/x86/arch-x86-x86/shared/vndk-core/
libvixl-arm.so 

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