| /external/libxaac/decoder/armv7/ |
| ixheaacd_fft_15_ld.s | 306 SUB r2, r2, r4 @ sub_r = sub32(buf1[2], buf1[4])@
316 SMULWB r2, r2, r12 @ p3 = mult32x16in32_shl(sub_r, sinmu)@
352 SUB r2, r2, r4 @ sub_r = sub32(buf1[2], buf1[4])@
361 SMULWB r2, r2, r12 @ p3 = mult32x16in32_shl(sub_r, sinmu)@
396 SUB r2, r2, r4 @ sub_r = sub32(buf1[2], buf1[4])@
406 SMULWB r2, r2, r12 @ p3 = mult32x16in32_shl(sub_r, sinmu)@
440 SUB r2, r2, r4 @ sub_r = sub32(buf1[2], buf1[4])@
449 SMULWB r2, r2, r12 @ p3 = mult32x16in32_shl(sub_r, sinmu)@
482 SUB r2, r2, r4 @ sub_r = sub32(buf1[2], buf1[4])@
491 SMULWB r2, r2, r12 @ p3 = mult32x16in32_shl(sub_r, sinmu)
[all...] |
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| deblock_msa.c | 547 v8i16 sub_r, sub_l, sum_r, sum_l, mask0, mask1; local
559 HSUB_UB2_SH(src_r, src_l, sub_r, sub_l);
561 sum_r[0] = sum + sub_r[0];
563 sum_r[cnt + 1] = sum_r[cnt] + sub_r[cnt + 1];
577 UNPCK_SH_SW(sub_r, sub0, sub1);
643 v8i16 dst_r_h, dst_l_h, sub_r, sub_l, mask0, mask1; local
[all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/Generic/ |
| print-arith-fp.ll | 28 %sub_r = fsub double %a, %b ; <double> [#uses=1]
38 call i32 (i8*, ...)* @printf( i8* %sub_s, double %sub_r ) ; <i32>:4 [#uses=0]
|
| print-arith-int.ll | 33 %sub_r = sub i32 %a, %b ; <i32> [#uses=1]
43 call i32 (i8*, ...)* @printf( i8* %sub_s, i32 %sub_r ) ; <i32>:4 [#uses=0]
|
| /external/llvm/test/CodeGen/Generic/ |
| print-arith-fp.ll | 28 %sub_r = fsub double %a, %b ; <double> [#uses=1]
38 call i32 (i8*, ...) @printf( i8* %sub_s, double %sub_r ) ; <i32>:4 [#uses=0]
|
| print-arith-int.ll | 33 %sub_r = sub i32 %a, %b ; <i32> [#uses=1]
43 call i32 (i8*, ...) @printf( i8* %sub_s, i32 %sub_r ) ; <i32>:4 [#uses=0]
|
| /external/llvm/test/CodeGen/MIR/Lanai/ |
| peephole-compare.mir | 215 %4 = SUB_R %1, %0, 0
311 %4 = SUB_R %1, %0, 0
361 %4 = SUB_R %1, %0, 0
411 %4 = SUB_R %1, %0, 0
461 %4 = SUB_R %1, %0, 0
511 %4 = SUB_R %1, %0, 0
675 %0 = SUB_R killed %6, killed %3, 0
|
| /external/libxaac/decoder/ |
| ixheaacd_esbr_fft.c | 1057 FLOAT32 add_r, sub_r; local
1072 sub_r = inp[2] - inp[4];
1078 p3 = sub_r * sinmu;
|
| ixheaacd_aac_imdct.c | 2210 WORD32 add_r, sub_r; local
[all...] |
| ixheaacd_fft.c | 1577 WORD32 add_r, sub_r; local
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiRegisterInfo.cpp | 201 HasNegOffset ? TII->get(Lanai::SUB_R) : TII->get(Lanai::ADD_R),
|
| LanaiMemAluCombiner.cpp | 208 case Lanai::SUB_R:
|
| LanaiInstrInfo.cpp | 211 OI->getOpcode() == Lanai::SUB_R &&
266 case Lanai::SUB_R:
|
| LanaiInstrInfo.td | 474 (SRL_R GPR:$Rs1, (SUB_R R0, GPR:$Rs2))>;
476 (SRA_R GPR:$Rs1, (SUB_R R0, GPR:$Rs2))>;
|
| /external/llvm/test/CodeGen/X86/ |
| avx512-vec-cmp.ll | 672 %sub_r = sub <16 x i32> %a, %b
673 %cmp.i2.i = icmp sgt <16 x i32> %sub_r, %a
676 %res = select <16 x i1> %mask, <16 x i32> zeroinitializer, <16 x i32> %sub_r
687 %sub_r = sub <8 x i64> %a, %b
688 %cmp.i2.i = icmp sgt <8 x i64> %sub_r, %a
691 %res = select <8 x i1> %mask, <8 x i64> zeroinitializer, <8 x i64> %sub_r
[all...] |
