| /art/runtime/interpreter/mterp/arm/ |
| op_int_to_byte.S | 1 %include "arm/unop.S" {"instr":"sxtb r0, r0"}
|
| /art/runtime/interpreter/mterp/arm64/ |
| op_iget_byte.S | 1 %include "arm64/op_iget.S" { "helper":"artGetByteInstanceFromCode", "extend":"sxtb w0, w0" }
|
| op_int_to_byte.S | 1 %include "arm64/unop.S" {"instr":"sxtb w0, w0"}
|
| op_sget_byte.S | 1 %include "arm64/op_sget.S" {"helper":"MterpGetByteStatic", "extend":"sxtb w0, w0"}
|
| /external/vixl/test/aarch32/traces/ |
| assembler-cond-rd-operand-rn-ror-amount-sxtb-a32.h | 38 0x75, 0x20, 0xaf, 0x76 // sxtb vc r2 r5 ROR 0
41 0x77, 0x50, 0xaf, 0x06 // sxtb eq r5 r7 ROR 0
44 0x72, 0x34, 0xaf, 0xa6 // sxtb ge r3 r2 ROR 8
47 0x73, 0xb8, 0xaf, 0x36 // sxtb cc r11 r3 ROR 16
50 0x76, 0xd0, 0xaf, 0x26 // sxtb cs r13 r6 ROR 0
53 0x77, 0x68, 0xaf, 0xe6 // sxtb al r6 r7 ROR 16
56 0x7c, 0xc0, 0xaf, 0xd6 // sxtb le r12 r12 ROR 0
59 0x75, 0x48, 0xaf, 0x46 // sxtb mi r4 r5 ROR 16
62 0x72, 0x98, 0xaf, 0x56 // sxtb pl r9 r2 ROR 16
65 0x7b, 0x54, 0xaf, 0x66 // sxtb vs r5 r11 ROR
[all...] |
| assembler-cond-rd-operand-rn-sxtb-a32.h | 38 0x72, 0xd0, 0xaf, 0xb6 // sxtb lt r13 r2
41 0x79, 0x20, 0xaf, 0x26 // sxtb cs r2 r9
44 0x71, 0xc0, 0xaf, 0x16 // sxtb ne r12 r1
47 0x71, 0x00, 0xaf, 0x36 // sxtb cc r0 r1
50 0x70, 0x60, 0xaf, 0x56 // sxtb pl r6 r0
53 0x76, 0x10, 0xaf, 0x56 // sxtb pl r1 r6
56 0x74, 0xa0, 0xaf, 0x66 // sxtb vs r10 r4
59 0x74, 0xa0, 0xaf, 0x46 // sxtb mi r10 r4
62 0x73, 0xc0, 0xaf, 0xa6 // sxtb ge r12 r3
65 0x70, 0x20, 0xaf, 0xb6 // sxtb lt r2 r
[all...] |
| assembler-cond-rd-operand-rn-ror-amount-sxtb-t32.h | 38 0x40, 0xb2 // sxtb al r0 r0 ROR 0
41 0x4f, 0xfa, 0x90, 0xf0 // sxtb al r0 r0 ROR 8
44 0x4f, 0xfa, 0xa0, 0xf0 // sxtb al r0 r0 ROR 16
47 0x4f, 0xfa, 0xb0, 0xf0 // sxtb al r0 r0 ROR 24
50 0x48, 0xb2 // sxtb al r0 r1 ROR 0
53 0x4f, 0xfa, 0x91, 0xf0 // sxtb al r0 r1 ROR 8
56 0x4f, 0xfa, 0xa1, 0xf0 // sxtb al r0 r1 ROR 16
59 0x4f, 0xfa, 0xb1, 0xf0 // sxtb al r0 r1 ROR 24
62 0x50, 0xb2 // sxtb al r0 r2 ROR 0
65 0x4f, 0xfa, 0x92, 0xf0 // sxtb al r0 r2 ROR
[all...] |
| assembler-cond-rd-operand-rn-sxtb-t32.h | 38 0x40, 0xb2 // sxtb al r0 r0
41 0x48, 0xb2 // sxtb al r0 r1
44 0x50, 0xb2 // sxtb al r0 r2
47 0x58, 0xb2 // sxtb al r0 r3
50 0x60, 0xb2 // sxtb al r0 r4
53 0x68, 0xb2 // sxtb al r0 r5
56 0x70, 0xb2 // sxtb al r0 r6
59 0x78, 0xb2 // sxtb al r0 r7
62 0x4f, 0xfa, 0x88, 0xf0 // sxtb al r0 r8
65 0x4f, 0xfa, 0x89, 0xf0 // sxtb al r0 r
[all...] |
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| div-vec.ll | 314 ; ASM: sxtb r0, r0
315 ; ASM: sxtb r1, r1
317 ; ASM: sxtb r0, r0
318 ; ASM: sxtb r1, r1
320 ; ASM: sxtb r0, r0
321 ; ASM: sxtb r1, r1
323 ; ASM: sxtb r0, r0
324 ; ASM: sxtb r1, r1
326 ; ASM: sxtb r0, r0
327 ; ASM: sxtb r1, r
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| thumbv6.s | 15 sxtb r1, r2
|
| thumbv6.d | 17 0+012 <[^>]*> b251 * sxtb r1, r2
|
| /external/llvm/test/CodeGen/ARM/ |
| sxt_rot.ll | 5 ; CHECK: sxtb r0, r0
13 ; CHECK: sxtb r0, r0
|
| fast-isel-icmp.ll | 38 ; ARM: sxtb r0, r0
39 ; ARM: sxtb r1, r1
42 ; THUMB: sxtb r0, r0
43 ; THUMB: sxtb r1, r1
|
| fast-isel-deadcode.ll | 15 ; THUMB-NOT: sxtb
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| sxt_rot.ll | 5 ; CHECK: sxtb r0, r0
12 ; CHECK: sxtb r0, r0, ror #8
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| thumb2-sxt_rot.ll | 5 ; CHECK: sxtb r0, r0
12 ; CHECK: sxtb.w r0, r0, ror #8
|
| thumb2-sxt-uxt.ll | 12 ; CHECK: sxtb
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| addsub.d | 33 64: 0b2180f0 add w16, w7, w1, sxtb
34 68: 0b2180f0 add w16, w7, w1, sxtb
35 6c: 0b2184f0 add w16, w7, w1, sxtb #1
36 70: 0b2188f0 add w16, w7, w1, sxtb #2
37 74: 0b218cf0 add w16, w7, w1, sxtb #3
38 78: 0b2190f0 add w16, w7, w1, sxtb #4
87 13c: 0b2183f0 add w16, wsp, w1, sxtb
88 140: 0b2183f0 add w16, wsp, w1, sxtb
89 144: 0b2187f0 add w16, wsp, w1, sxtb #1
90 148: 0b218bf0 add w16, wsp, w1, sxtb #
[all...] |
| shifted.d | 361 584: 8b238041 add x1, x2, w3, sxtb
362 588: 8b238441 add x1, x2, w3, sxtb #1
363 58c: 8b238841 add x1, x2, w3, sxtb #2
364 590: 8b238c41 add x1, x2, w3, sxtb #3
365 594: 8b239041 add x1, x2, w3, sxtb #4
409 644: 0b238041 add w1, w2, w3, sxtb
410 648: 0b238441 add w1, w2, w3, sxtb #1
411 64c: 0b238841 add w1, w2, w3, sxtb #2
412 650: 0b238c41 add w1, w2, w3, sxtb #3
413 654: 0b239041 add w1, w2, w3, sxtb #
[all...] |
| bitfield-alias.s | 66 bf_32r sxtb
67 bf_64x sxtb
|
| shifted.s | 120 op3_64x \op, sxtb
129 op3_32x \op, sxtb
141 op2_64x \op, sxtb
151 op2_32x \op, sxtb
|
| /external/capstone/suite/MC/ARM/ |
| thumb.s.cs | 10 0x5a,0xb2 = sxtb r2, r3
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-sxt-uxt.ll | 12 ; CHECK: sxtb
|
| /external/llvm/test/MC/ARM/ |
| thumb.s | 25 sxtb r2, r3
27 @ CHECK: sxtb r2, r3 @ encoding: [0x5a,0xb2]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| thumb.s | 25 sxtb r2, r3
27 @ CHECK: sxtb r2, r3 @ encoding: [0x5a,0xb2]
|
