| /art/runtime/interpreter/mterp/arm/ |
| op_int_to_short.S | 1 %include "arm/unop.S" {"instr":"sxth r0, r0"}
|
| /art/runtime/interpreter/mterp/arm64/ |
| op_iget_short.S | 1 %include "arm64/op_iget.S" { "helper":"artGetShortInstanceFromCode", "extend":"sxth w0, w0" }
|
| op_int_to_short.S | 1 %include "arm64/unop.S" {"instr":"sxth w0, w0"}
|
| op_sget_short.S | 1 %include "arm64/op_sget.S" {"helper":"MterpGetShortStatic", "extend":"sxth w0, w0"}
|
| /external/vixl/test/aarch32/traces/ |
| assembler-cond-rd-operand-rn-ror-amount-sxth-a32.h | 38 0x75, 0x20, 0xbf, 0x76 // sxth vc r2 r5 ROR 0
41 0x77, 0x50, 0xbf, 0x06 // sxth eq r5 r7 ROR 0
44 0x72, 0x34, 0xbf, 0xa6 // sxth ge r3 r2 ROR 8
47 0x73, 0xb8, 0xbf, 0x36 // sxth cc r11 r3 ROR 16
50 0x76, 0xd0, 0xbf, 0x26 // sxth cs r13 r6 ROR 0
53 0x77, 0x68, 0xbf, 0xe6 // sxth al r6 r7 ROR 16
56 0x7c, 0xc0, 0xbf, 0xd6 // sxth le r12 r12 ROR 0
59 0x75, 0x48, 0xbf, 0x46 // sxth mi r4 r5 ROR 16
62 0x72, 0x98, 0xbf, 0x56 // sxth pl r9 r2 ROR 16
65 0x7b, 0x54, 0xbf, 0x66 // sxth vs r5 r11 ROR
[all...] |
| assembler-cond-rd-operand-rn-sxth-a32.h | 38 0x72, 0xd0, 0xbf, 0xb6 // sxth lt r13 r2
41 0x79, 0x20, 0xbf, 0x26 // sxth cs r2 r9
44 0x71, 0xc0, 0xbf, 0x16 // sxth ne r12 r1
47 0x71, 0x00, 0xbf, 0x36 // sxth cc r0 r1
50 0x70, 0x60, 0xbf, 0x56 // sxth pl r6 r0
53 0x76, 0x10, 0xbf, 0x56 // sxth pl r1 r6
56 0x74, 0xa0, 0xbf, 0x66 // sxth vs r10 r4
59 0x74, 0xa0, 0xbf, 0x46 // sxth mi r10 r4
62 0x73, 0xc0, 0xbf, 0xa6 // sxth ge r12 r3
65 0x70, 0x20, 0xbf, 0xb6 // sxth lt r2 r
[all...] |
| assembler-cond-rd-operand-rn-ror-amount-sxth-t32.h | 38 0x00, 0xb2 // sxth al r0 r0 ROR 0
41 0x0f, 0xfa, 0x90, 0xf0 // sxth al r0 r0 ROR 8
44 0x0f, 0xfa, 0xa0, 0xf0 // sxth al r0 r0 ROR 16
47 0x0f, 0xfa, 0xb0, 0xf0 // sxth al r0 r0 ROR 24
50 0x08, 0xb2 // sxth al r0 r1 ROR 0
53 0x0f, 0xfa, 0x91, 0xf0 // sxth al r0 r1 ROR 8
56 0x0f, 0xfa, 0xa1, 0xf0 // sxth al r0 r1 ROR 16
59 0x0f, 0xfa, 0xb1, 0xf0 // sxth al r0 r1 ROR 24
62 0x10, 0xb2 // sxth al r0 r2 ROR 0
65 0x0f, 0xfa, 0x92, 0xf0 // sxth al r0 r2 ROR
[all...] |
| assembler-cond-rd-operand-rn-sxth-t32.h | 38 0x00, 0xb2 // sxth al r0 r0
41 0x08, 0xb2 // sxth al r0 r1
44 0x10, 0xb2 // sxth al r0 r2
47 0x18, 0xb2 // sxth al r0 r3
50 0x20, 0xb2 // sxth al r0 r4
53 0x28, 0xb2 // sxth al r0 r5
56 0x30, 0xb2 // sxth al r0 r6
59 0x38, 0xb2 // sxth al r0 r7
62 0x0f, 0xfa, 0x88, 0xf0 // sxth al r0 r8
65 0x0f, 0xfa, 0x89, 0xf0 // sxth al r0 r
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| thumbv6.s | 14 sxth r0, r1
|
| r15-bad.s | 52 sxth r15, r2
53 sxth r1, r15
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| addsub.d | 39 7c: 0b21a0f0 add w16, w7, w1, sxth
40 80: 0b21a0f0 add w16, w7, w1, sxth
41 84: 0b21a4f0 add w16, w7, w1, sxth #1
42 88: 0b21a8f0 add w16, w7, w1, sxth #2
43 8c: 0b21acf0 add w16, w7, w1, sxth #3
44 90: 0b21b0f0 add w16, w7, w1, sxth #4
93 154: 0b21a3f0 add w16, wsp, w1, sxth
94 158: 0b21a3f0 add w16, wsp, w1, sxth
95 15c: 0b21a7f0 add w16, wsp, w1, sxth #1
96 160: 0b21abf0 add w16, wsp, w1, sxth #
[all...] |
| shifted.d | 366 598: 8b23a041 add x1, x2, w3, sxth
367 59c: 8b23a441 add x1, x2, w3, sxth #1
368 5a0: 8b23a841 add x1, x2, w3, sxth #2
369 5a4: 8b23ac41 add x1, x2, w3, sxth #3
370 5a8: 8b23b041 add x1, x2, w3, sxth #4
414 658: 0b23a041 add w1, w2, w3, sxth
415 65c: 0b23a441 add w1, w2, w3, sxth #1
416 660: 0b23a841 add w1, w2, w3, sxth #2
417 664: 0b23ac41 add w1, w2, w3, sxth #3
418 668: 0b23b041 add w1, w2, w3, sxth #
[all...] |
| bitfield-alias.s | 68 bf_32r sxth
69 bf_64x sxth
|
| bitfield-dump | 8 8: 13003cff sxth wzr, w7
9 c: 93403cff sxth xzr, w7
36 78: 13003cff sxth wzr, w7
50 b0: 13003cff sxth wzr, w7
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/ |
| div-vec.ll | 276 ; ASM: sxth r0, r0
277 ; ASM: sxth r1, r1
279 ; ASM: sxth r0, r0
280 ; ASM: sxth r1, r1
282 ; ASM: sxth r0, r0
283 ; ASM: sxth r1, r1
285 ; ASM: sxth r0, r0
286 ; ASM: sxth r1, r1
288 ; ASM: sxth r0, r0
289 ; ASM: sxth r1, r
[all...] |
| /external/capstone/suite/MC/ARM/ |
| thumb.s.cs | 11 0x1a,0xb2 = sxth r2, r3
|
| /external/llvm/test/CodeGen/ARM/ |
| fast-isel-icmp.ll | 8 ; ARM: sxth r0, r0
9 ; ARM: sxth r1, r1
12 ; THUMB: sxth r0, r0
13 ; THUMB: sxth r1, r1
|
| fast-isel-ret.ll | 38 ; CHECK: sxth r0, r0
55 ; CHECK-NOT: sxth
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-sxt-uxt.ll | 5 ; CHECK: sxth
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| thumb2-sxt-uxt.ll | 5 ; CHECK: sxth
|
| /external/llvm/test/MC/ARM/ |
| thumb.s | 26 sxth r2, r3
28 @ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2]
|
| /external/llvm/test/CodeGen/AArch64/ |
| adc.ll | 58 ; CHECK-LE: adds x0, x0, w2, sxth #3
60 ; CHECK-BE: adds x1, x1, w2, sxth #3
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| thumb.s | 26 sxth r2, r3
28 @ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2]
|
| /external/llvm/test/CodeGen/Hexagon/ |
| maxh.ll | 4 ; CHECK-NOT: sxth
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| fast-isel.ll | 105 ; THUMB: sxth
109 ; ARM: sxth
125 ; THUMB: sxth
131 ; ARM: sxth
|
