| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| any-idiv.s | 4 udiv r0, r1, r2
|
| arm-idiv.s | 4 udiv r5, r9, r8 label
6 udiv r9, r5, r7 label
|
| armv7-a+idiv.s | 7 udiv r0, r1, r2
13 udiv r0, r1, r2
|
| arm-idiv.d | 7 0+000 <[^>]*> e735f819 udiv r5, r9, r8
8 0+004 <[^>]*> e739f715 udiv r9, r5, r7
|
| /external/llvm/test/MC/ARM/ |
| directive-arch_extension-toggle.s | 6 udiv r0, r1, r2
8 udiv r0, r1, r2
|
| directive-arch_extension-mode-switch.s | 11 udiv r0, r0, r1
15 udiv r0, r0, r1
|
| /external/vixl/test/aarch32/traces/ |
| assembler-cond-rd-rn-rm-udiv-a32.h | 38 0x19, 0xf5, 0x31, 0x87 // udiv hi r1 r9 r5
41 0x16, 0xf2, 0x38, 0x57 // udiv pl r8 r6 r2
44 0x18, 0xf2, 0x35, 0x87 // udiv hi r5 r8 r2
47 0x12, 0xf7, 0x39, 0x77 // udiv vc r9 r2 r7
50 0x16, 0xf3, 0x34, 0xb7 // udiv lt r4 r6 r3
53 0x16, 0xf2, 0x3b, 0xd7 // udiv le r11 r6 r2
56 0x1e, 0xf4, 0x38, 0x37 // udiv cc r8 r14 r4
59 0x1e, 0xf6, 0x35, 0xd7 // udiv le r5 r14 r6
62 0x11, 0xf0, 0x36, 0xb7 // udiv lt r6 r1 r0
65 0x10, 0xf9, 0x35, 0xb7 // udiv lt r5 r0 r
[all...] |
| assembler-cond-rd-rn-rm-udiv-t32.h | 38 0xbc, 0xfb, 0xf2, 0xf5 // udiv al r5 r12 r2
41 0xb3, 0xfb, 0xfc, 0xf7 // udiv al r7 r3 r12
44 0xb2, 0xfb, 0xfa, 0xf1 // udiv al r1 r2 r10
47 0xb7, 0xfb, 0xf1, 0xf2 // udiv al r2 r7 r1
50 0xb9, 0xfb, 0xf0, 0xfb // udiv al r11 r9 r0
53 0xb9, 0xfb, 0xfa, 0xf6 // udiv al r6 r9 r10
56 0xb5, 0xfb, 0xf0, 0xf0 // udiv al r0 r5 r0
59 0xb6, 0xfb, 0xf6, 0xf4 // udiv al r4 r6 r6
62 0xbd, 0xfb, 0xf1, 0xf1 // udiv al r1 r13 r1
65 0xbe, 0xfb, 0xf8, 0xf8 // udiv al r8 r14 r
[all...] |
| /external/llvm/test/CodeGen/AMDGPU/ |
| lds-oqap-crash.ll | 17 ; so we'll use udiv instructions.
18 %div0 = udiv i32 %0, %b
19 %div1 = udiv i32 %div0, %a
20 %div2 = udiv i32 %div1, 11
21 %div3 = udiv i32 %div2, %a
22 %div4 = udiv i32 %div3, %b
23 %div5 = udiv i32 %div4, %c
24 %div6 = udiv i32 %div5, %div0
25 %div7 = udiv i32 %div6, %div1
|
| structurize.ll | 68 ; so we'll use udiv instructions.
69 %div0 = udiv i32 %a, %b
70 %div1 = udiv i32 %div0, %4
71 %div2 = udiv i32 %div1, 11
72 %div3 = udiv i32 %div2, %a
73 %div4 = udiv i32 %div3, %b
74 %div5 = udiv i32 %div4, %c
75 %div6 = udiv i32 %div5, %div0
76 %div7 = udiv i32 %div6, %div1
|
| /external/llvm/test/CodeGen/SPARC/ |
| multiple-div.ll | 7 ;; because the spec says to treat %y as potentially-written by udiv.
11 ; CHECK: udiv
13 ; CHECK: udiv
17 %r = udiv i32 %a, %b
18 %r2 = udiv i32 %b, %a
|
| /external/capstone/suite/MC/ARM/ |
| idiv-thumb.s.cs | 3 0xb4,0xfb,0xf5,0xf3 = udiv r3, r4, r5
|
| idiv.s.cs | 3 0x14,0xf5,0x33,0xe7 = udiv r3, r4, r5
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2008-11-27-UDivNegative.ll | 4 %A = udiv i8 %x, 250
|
| udiv-simplify-bug-1.ll | 2 ; RUN: grep udiv %t1.ll | count 2
6 ; The udiv instructions shouldn't be optimized away, and the
11 %r = udiv i32 %y, %g
17 %r = udiv i32 %y, %v
|
| udiv_select_to_select_shift.ll | 2 ; udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2)
7 ; RUN: not grep udiv %t
12 %quotient1 = udiv i64 %X, %divisor1
14 %quotient2 = udiv i64 %X, %divisor2
|
| apint-div1.ll | 8 %Y = udiv i33 %X, 4096
14 %Y = udiv i49 %X, %tmp.0
20 %R = udiv i59 %X, %V
|
| apint-div2.ll | 8 %Y = udiv i333 %X, 70368744177664
14 %Y = udiv i499 %X, %tmp.0
20 %R = udiv i599 %X, %V
|
| 2012-08-28-udiv_ashl.ll | 9 ; CHECK: udiv i32 %x, 400
14 %div1 = udiv i32 %div, 100
26 %div1 = udiv i32 %div, 100
31 ; CHECK: udiv i32 %x, 400
37 ; unsigned inputs), turn this into a udiv.
45 ; CHECK: udiv i80 %x, 400
49 %div1 = udiv i80 %div, 100
55 %div1 = udiv i32 %div, 100
|
| udiv-simplify-bug-0.ll | 5 %r = udiv i32 %y, -1
11 %r = udiv i32 %y, 3
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| 2008-11-27-UDivNegative.ll | 4 %A = udiv i8 %x, 250
|
| udiv-simplify-bug-1.ll | 2 ; RUN: grep udiv %t1.ll | count 2
6 ; The udiv instructions shouldn't be optimized away, and the
11 %r = udiv i32 %y, 3
17 %r = udiv i32 %y, %v
|
| udiv_select_to_select_shift.ll | 2 ; udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2)
7 ; RUN: not grep udiv %t
12 %quotient1 = udiv i64 %X, %divisor1
14 %quotient2 = udiv i64 %X, %divisor2
|
| apint-div1.ll | 8 %Y = udiv i33 %X, 4096
14 %Y = udiv i49 %X, %tmp.0
20 %R = udiv i59 %X, %V
|
| apint-div2.ll | 8 %Y = udiv i333 %X, 70368744177664
14 %Y = udiv i499 %X, %tmp.0
20 %R = udiv i599 %X, %V
|
