| /external/llvm/test/CodeGen/PowerPC/ |
| vec_extload.ll | 30 ; CHECK: vspltisb [[VMASK:[0-9]+]], 15
31 ; CHECK-NEXT: vand 2, 2, [[VMASK]]
53 ; CHECK-NEXT: lvx [[VMASK:[0-9]+]], {{[0-9]+}}, [[RMASKTOC]]
54 ; CHECK-NEXT: vand 2, 2, [[VMASK]]
75 ; CHECK: vspltisw [[VMASK:[0-9]+]], -16
76 ; CHECK-NEXT: vsrw [[VMASK]], [[VMASK]], [[VMASK]]
77 ; CHECK-NEXT: vand 2, 2, [[VMASK]]
|
| /external/iptables/include/linux/netfilter/ |
| xt_ipvs.h | 19 union nf_inet_addr vaddr, vmask; member in struct:xt_ipvs_mtinfo
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/linux/netfilter/ |
| xt_ipvs.h | 19 union nf_inet_addr vaddr, vmask; member in struct:xt_ipvs_mtinfo
|
| /external/skia/src/opts/ |
| SkBlitMask_opts_arm_neon.cpp | 28 uint16x8_t vmask; local
33 vmask = vld1q_u16(src);
36 vsel_trans = vmovn_u16(vceqq_u16(vmask, vdupq_n_u16(0)));
37 vsel_opq = vmovn_u16(vceqq_u16(vmask, vdupq_n_u16(0xFFFF)));
40 vmaskR = vshrq_n_u16(vmask, SK_R16_SHIFT);
41 vmaskG = vshrq_n_u16(vshlq_n_u16(vmask, SK_R16_BITS),
43 vmaskB = vmask & vdupq_n_u16(SK_B16_MASK);
91 uint16x8_t vmask; local
95 vmask = vld1q_u16(src);
98 vmaskR = vshrq_n_u16(vmask, SK_R16_SHIFT)
[all...] |
| SkBlitMask_opts.h | 41 uint8x8_t vmask = vld1_u8(mask); local
42 uint16x8_t vscale, vmask256 = SkAlpha255To256_neon8(vmask);
47 vscale = vsubw_u8(vdupq_n_u16(256), vmask);
109 uint8x8_t vmask = vld1_u8(mask); local
110 uint16x8_t vscale = vsubw_u8(vdupq_n_u16(256), vmask);
114 vdevice.val[NEON_A] += vmask;
|
| /external/skqp/src/opts/ |
| SkBlitMask_opts_arm_neon.cpp | 28 uint16x8_t vmask; local
33 vmask = vld1q_u16(src);
36 vsel_trans = vmovn_u16(vceqq_u16(vmask, vdupq_n_u16(0)));
37 vsel_opq = vmovn_u16(vceqq_u16(vmask, vdupq_n_u16(0xFFFF)));
40 vmaskR = vshrq_n_u16(vmask, SK_R16_SHIFT);
41 vmaskG = vshrq_n_u16(vshlq_n_u16(vmask, SK_R16_BITS),
43 vmaskB = vmask & vdupq_n_u16(SK_B16_MASK);
91 uint16x8_t vmask; local
95 vmask = vld1q_u16(src);
98 vmaskR = vshrq_n_u16(vmask, SK_R16_SHIFT)
[all...] |
| SkBlitMask_opts.h | 41 uint8x8_t vmask = vld1_u8(mask); local
42 uint16x8_t vscale, vmask256 = SkAlpha255To256_neon8(vmask);
47 vscale = vsubw_u8(vdupq_n_u16(256), vmask);
109 uint8x8_t vmask = vld1_u8(mask); local
110 uint16x8_t vscale = vsubw_u8(vdupq_n_u16(256), vmask);
114 vdevice.val[NEON_A] += vmask;
|
| /external/kernel-headers/original/uapi/linux/netfilter/ |
| xt_ipvs.h | 21 union nf_inet_addr vaddr, vmask; member in struct:xt_ipvs_mtinfo
|
| /bionic/libc/kernel/uapi/linux/netfilter/ |
| xt_ipvs.h | 35 union nf_inet_addr vaddr, vmask; member in struct:xt_ipvs_mtinfo
|
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/ |
| builder_misc.cpp | 369 /// @param vMask - SIMD wide mask that controls whether to access memory load 0
538 /// @param vMask - SIMD wide mask that controls whether to access memory or the src values
540 Value *Builder::GATHERPS(Value* vSrc, Value* pBase, Value* vIndices, Value* vMask, Value* scale)
548 vMask = BITCAST(vMask, mSimdFP32Ty);
549 vGather = VGATHERPS(vSrc,pBase,vIndices,vMask,scale);
562 Value *mask = MASK(vMask);
590 /// @param vMask - SIMD wide mask that controls whether to access memory or the src values
592 Value *Builder::GATHERDD(Value* vSrc, Value* pBase, Value* vIndices, Value* vMask, Value* scale)
599 vGather = VGATHERDD(vSrc, pBase, vIndices, vMask, scale)
[all...] |
| builder_misc.h | 96 Value *MASK(Value* vmask);
97 Value *VMASK(Value* mask);
118 void SCATTERPS(Value* pDst, Value* vSrc, Value* vOffsets, Value* vMask);
|
| fetch_jit.cpp | 181 Value* cutMask = VMASK(ICMP_EQ(vIndices, vCutIndex));
800 vGatherMask = VMASK(vGatherMask);
[all...] |
| blend_jit.cpp | 509 pMask = VMASK(pMask);
658 Value* vMask[4];
675 vMask[i] = VIMMED1(0xFFFFFFFF);
678 vMask[i] = VIMMED1((1 << info.bpc[i]) - 1);
724 result[i] = AND(result[i], vMask[i]);
|
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/core/ |
| clip.h | 380 const simdscalar vMask = _mm256_set_ps(0, -1, -1, -1, -1, -1, -1, -1);
404 transposedPrims[0].attrib[VERTEX_POSITION_SLOT][c] = _simd_mask_i32gather_ps(_mm256_undefined_ps(), (const float*)pBase, vOffsets, vMask, 1);
415 transposedPrims[0].attrib[attribSlot][c] = _simd_mask_i32gather_ps(_mm256_undefined_ps(), (const float*)pBase, vOffsets, vMask, 1);
426 transposedPrims[0].attrib[VERTEX_CLIPCULL_DIST_LO_SLOT][c] = _simd_mask_i32gather_ps(_mm256_undefined_ps(), (const float*)pBase, vOffsets, vMask, 1);
436 transposedPrims[0].attrib[VERTEX_CLIPCULL_DIST_HI_SLOT][c] = _simd_mask_i32gather_ps(_mm256_undefined_ps(), (const float*)pBase, vOffsets, vMask, 1);
518 ClipSimd(vMask(primMask), vMask(clipMask), pa, primId, viewportIdx);
558 inline simdscalar GatherComponent(const float* pBuffer, uint32_t attrib, simdscalar vMask, simdscalari vIndices, uint32_t component)
562 return _simd_mask_i32gather_ps(vSrc, pBuffer, vOffsets, vMask, 1);
565 inline void ScatterComponent(const float* pBuffer, uint32_t attrib, simdscalar vMask, simdscalari vIndices, uint32_t component, simdscalar vSrc
[all...] |
| depthstencil.h | 228 simdscalar vMask = _simd_and_ps(depthMask, coverageMask);
229 _simd_maskstore_ps((float*)pDepthBase, _simd_castps_si(vMask), interpZ);
|
| backend.h | 564 vCoverageMask[sample] = _simd_and_ps(activeLanes, vMask(pCoverageMask[currentSimdIn8x8] & MASK));
585 vCoverageMask[sample] = _simd_and_ps(vCoverageMask[sample], vMask(CalcDepthBoundsAcceptMask(z, minz, maxz)));
616 vCoverageMask[sample] = _simd_and_ps(vCoverageMask[sample], vMask(~clipMask));
[all...] |
| backend.cpp | 534 simdscalar vCoverageMask = vMask(coverageMask);
745 simdscalar vCoverageMask = vMask(coverageMask);
[all...] |
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_pwr8.h | 245 __m128i vmask, tmp1, tmp2; local
247 vmask = vec_lvsl(0, src);
251 vsrc.m128ui = (vector unsigned int) vec_perm (tmp1, tmp2, vmask);
|
| /external/swiftshader/third_party/subzero/src/ |
| IceClFlags.cpp | 198 Ice::VerboseMask VMask = Ice::IceV_None;
203 VMask |= Param[i];
205 return VMask;
|
| IceCfg.h | 55 return VMask & Mask;
57 void setVerbose(VerboseMask Mask) { VMask = Mask; }
317 VerboseMask VMask;
|
| /external/devlib/src/readenergy/ |
| readenergy.c | 47 #define VMASK 0xFFF
271 reading->sys_adc_ch4_vsys = (double)(VMASK & buffer[BASE_INDEX+4]) / SYS_ADC_CH4_VSYS_SCALE;
272 reading->sys_adc_ch5_va57 = (double)(VMASK & buffer[BASE_INDEX+5]) / SYS_ADC_CH5_VA57_SCALE;
273 reading->sys_adc_ch6_va53 = (double)(VMASK & buffer[BASE_INDEX+6]) / SYS_ADC_CH6_VA53_SCALE;
274 reading->sys_adc_ch7_vgpu = (double)(VMASK & buffer[BASE_INDEX+7]) / SYS_ADC_CH7_VGPU_SCALE;
|
| /external/iptables/extensions/ |
| libxt_ipvs.c | 77 memcpy(&data->vmask, &cb->val.hmask, sizeof(cb->val.hmask));
177 ipvs_mt_dump_addr(&data->vaddr, &data->vmask, family, numeric);
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| gen8_ps_state.c | 197 /* Initialize the execution mask with VMask. Otherwise, derivatives are
|
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/common/ |
| simdintrin.h | 383 __m256 _simd_mask_i32gather_ps(__m256 vSrc, const float* pBase, __m256i vOffsets, __m256 vMask, const int scale)
389 uint32_t mask = _simd_movemask_ps(vMask);
653 simdscalar vMask(int32_t mask)
[all...] |
| /external/mesa3d/src/gallium/drivers/swr/rasterizer/memory/ |
| StoreTile.h | 606 __m128i vMask = _mm_set1_epi32(0xFFFFFF);
608 vDst0 = _mm_andnot_si128(vMask, vDst0);
609 vDst0 = _mm_or_si128(vDst0, _mm_and_si128(vRow00, vMask));
610 vDst1 = _mm_andnot_si128(vMask, vDst1);
611 vDst1 = _mm_or_si128(vDst1, _mm_and_si128(vRow10, vMask));
[all...] |
