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  /external/llvm/test/MC/ARM/
neon-shiftaccum-encoding.s 72 vrsra.s8 d5, d26, #8
73 vrsra.s16 d6, d25, #16
74 vrsra.s32 d7, d24, #32
75 vrsra.s64 d14, d23, #64
76 vrsra.u8 d15, d22, #8
77 vrsra.u16 d16, d21, #16
78 vrsra.u32 d17, d20, #32
79 vrsra.u64 d18, d19, #64
80 vrsra.s8 q1, q2, #8
81 vrsra.s16 q2, q3, #1
    [all...]
neont2-shiftaccum-encoding.s 75 vrsra.s8 d5, d26, #8
76 vrsra.s16 d6, d25, #16
77 vrsra.s32 d7, d24, #32
78 vrsra.s64 d14, d23, #64
79 vrsra.u8 d15, d22, #8
80 vrsra.u16 d16, d21, #16
81 vrsra.u32 d17, d20, #32
82 vrsra.u64 d18, d19, #64
83 vrsra.s8 q1, q2, #8
84 vrsra.s16 q2, q3, #1
    [all...]
  /external/swiftshader/third_party/LLVM/test/MC/ARM/
neon-shiftaccum-encoding.s 35 @ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf2]
36 vrsra.s8 d17, d16, #8
37 @ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0x30,0x13,0xd0,0xf2]
38 vrsra.s16 d17, d16, #16
39 @ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0x30,0x13,0xe0,0xf2]
40 vrsra.s32 d17, d16, #32
41 @ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xb0,0x13,0xc0,0xf2]
42 vrsra.s64 d17, d16, #64
43 @ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0x30,0x13,0xc8,0xf3]
44 vrsra.u8 d17, d16, #
    [all...]
neont2-shiftaccum-encoding.s 37 @ CHECK: vrsra.s8 d17, d16, #8 @ encoding: [0xc8,0xef,0x30,0x13]
38 vrsra.s8 d17, d16, #8
39 @ CHECK: vrsra.s16 d17, d16, #16 @ encoding: [0xd0,0xef,0x30,0x13]
40 vrsra.s16 d17, d16, #16
41 @ CHECK: vrsra.s32 d17, d16, #32 @ encoding: [0xe0,0xef,0x30,0x13]
42 vrsra.s32 d17, d16, #32
43 @ CHECK: vrsra.s64 d17, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x13]
44 vrsra.s64 d17, d16, #64
45 @ CHECK: vrsra.u8 d17, d16, #8 @ encoding: [0xc8,0xff,0x30,0x13]
46 vrsra.u8 d17, d16, #
    [all...]
  /external/capstone/suite/MC/ARM/
neon-shiftaccum-encoding.s.cs 34 0x3a,0x53,0x88,0xf2 = vrsra.s8 d5, d26, #8
35 0x39,0x63,0x90,0xf2 = vrsra.s16 d6, d25, #16
36 0x38,0x73,0xa0,0xf2 = vrsra.s32 d7, d24, #32
37 0xb7,0xe3,0x80,0xf2 = vrsra.s64 d14, d23, #64
38 0x36,0xf3,0x88,0xf3 = vrsra.u8 d15, d22, #8
39 0x35,0x03,0xd0,0xf3 = vrsra.u16 d16, d21, #16
40 0x34,0x13,0xe0,0xf3 = vrsra.u32 d17, d20, #32
41 0xb3,0x23,0xc0,0xf3 = vrsra.u64 d18, d19, #64
42 0x54,0x23,0x88,0xf2 = vrsra.s8 q1, q2, #8
43 0x56,0x43,0x90,0xf2 = vrsra.s16 q2, q3, #1
    [all...]
neont2-shiftaccum-encoding.s.cs 34 0x88,0xef,0x3a,0x53 = vrsra.s8 d5, d26, #8
35 0x90,0xef,0x39,0x63 = vrsra.s16 d6, d25, #16
36 0xa0,0xef,0x38,0x73 = vrsra.s32 d7, d24, #32
37 0x80,0xef,0xb7,0xe3 = vrsra.s64 d14, d23, #64
38 0x88,0xff,0x36,0xf3 = vrsra.u8 d15, d22, #8
39 0xd0,0xff,0x35,0x03 = vrsra.u16 d16, d21, #16
40 0xe0,0xff,0x34,0x13 = vrsra.u32 d17, d20, #32
41 0xc0,0xff,0xb3,0x23 = vrsra.u64 d18, d19, #64
42 0x88,0xef,0x54,0x23 = vrsra.s8 q1, q2, #8
43 0x90,0xef,0x56,0x43 = vrsra.s16 q2, q3, #1
    [all...]
  /external/llvm/test/CodeGen/ARM/
vsra.ll 165 ;CHECK: vrsra.s8
175 ;CHECK: vrsra.s16
185 ;CHECK: vrsra.s32
195 ;CHECK: vrsra.s64
205 ;CHECK: vrsra.u8
215 ;CHECK: vrsra.u16
225 ;CHECK: vrsra.u32
235 ;CHECK: vrsra.u64
245 ;CHECK: vrsra.s8
255 ;CHECK: vrsra.s1
    [all...]
  /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
vsra.ll 165 ;CHECK: vrsra.s8
175 ;CHECK: vrsra.s16
185 ;CHECK: vrsra.s32
195 ;CHECK: vrsra.s64
205 ;CHECK: vrsra.u8
215 ;CHECK: vrsra.u16
225 ;CHECK: vrsra.u32
235 ;CHECK: vrsra.u64
245 ;CHECK: vrsra.s8
255 ;CHECK: vrsra.s1
    [all...]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/
neon-omit.s 49 vrsra.u16 q4,#6
94 vrsra.u16 q15,q4,#6
neon-omit.d 50 0[0-9a-f]+ <[^>]+> f39a8358 vrsra\.u16 q4, q4, #6
92 0[0-9a-f]+ <[^>]+> f3dae358 vrsra\.u16 q15, q4, #6
neon-cov.d     [all...]
  /external/llvm/test/MC/Disassembler/ARM/
neont2.txt 1210 # CHECK: vrsra.s8 d17, d16, #8
1212 # CHECK: vrsra.s16 d17, d16, #16
1214 # CHECK: vrsra.s32 d17, d16, #32
1216 # CHECK: vrsra.s64 d17, d16, #64
1218 # CHECK: vrsra.u8 d17, d16, #8
1220 # CHECK: vrsra.u16 d17, d16, #16
1222 # CHECK: vrsra.u32 d17, d16, #32
1224 # CHECK: vrsra.u64 d17, d16, #64
1226 # CHECK: vrsra.s8 q8, q9, #8
1228 # CHECK: vrsra.s16 q8, q9, #1
    [all...]
neon.txt     [all...]
  /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
neon.txt     [all...]
neont2.txt 1210 # CHECK: vrsra.s8 d17, d16, #8
1212 # CHECK: vrsra.s16 d17, d16, #16
1214 # CHECK: vrsra.s32 d17, d16, #32
1216 # CHECK: vrsra.s64 d17, d16, #64
1218 # CHECK: vrsra.u8 d17, d16, #8
1220 # CHECK: vrsra.u16 d17, d16, #16
1222 # CHECK: vrsra.u32 d17, d16, #32
1224 # CHECK: vrsra.u64 d17, d16, #64
1226 # CHECK: vrsra.s8 q8, q9, #8
1228 # CHECK: vrsra.s16 q8, q9, #1
    [all...]
  /frameworks/rs/cpu_ref/
rsCpuIntrinsics_neon_3DLUT.S 154 /* vrsra.u16 below would be more accurate, but this can result in a dim.0 case
  /prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9.x/include/
arm_neon.h     [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/lib/gcc/x86_64-linux/4.8/include/
arm_neon.h     [all...]
  /prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9.x/include/
arm_neon.h     [all...]
  /external/arm-neon-tests/
ref_vrsra_n.c 40 vrsra##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
  /external/valgrind/none/tests/arm/
neon128.stdout.exp     [all...]
neon64.stdout.exp     [all...]
  /external/vixl/src/aarch32/
constants-aarch32.cc 778 return "vrsra";
  /prebuilts/vndk/v27/arm/arch-arm-armv7-a-neon/shared/vndk-core/
libvixl-arm.so 
  /prebuilts/vndk/v27/arm64/arch-arm-armv7-a-neon/shared/vndk-core/
libvixl-arm.so 

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