1 ; REQUIRES: asserts 2 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s 3 ; Now this test spills one register. But a reload in the loop is cheaper than 4 ; the divsd so it's a win. 5 6 define fastcc void @fourn(double* %data, i32 %isign) nounwind { 7 ; CHECK: fourn 8 entry: 9 br label %bb 10 11 bb: ; preds = %bb, %entry 12 %indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2] 13 %idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1] 14 %0 = add i32 %indvar93, 2 ; <i32> [#uses=1] 15 %1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1] 16 br i1 %1, label %bb30.loopexit, label %bb 17 18 ; CHECK: %bb30.loopexit 19 ; CHECK: divsd %xmm0 20 ; CHECK: movsd %xmm0, 16(%esp) 21 ; CHECK: %bb3 22 bb3: ; preds = %bb30.loopexit, %bb25, %bb3 23 %2 = load i32, i32* null, align 4 ; <i32> [#uses=1] 24 %3 = mul i32 %2, 0 ; <i32> [#uses=1] 25 %4 = icmp slt i32 0, %3 ; <i1> [#uses=1] 26 br i1 %4, label %bb18, label %bb3 27 28 bb18: ; preds = %bb3 29 %5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1] 30 %6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1] 31 br label %bb24.preheader 32 33 bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader 34 br label %bb22.preheader 35 36 bb25: ; preds = %bb24.preheader 37 %7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0] 38 %8 = add i32 %i3.122100, 0 ; <i32> [#uses=1] 39 %9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1] 40 br i1 %9, label %bb3, label %bb24.preheader 41 42 bb24.preheader: ; preds = %bb25, %bb18 43 %i3.122100 = or i32 0, 1 ; <i32> [#uses=2] 44 %10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1] 45 br i1 %10, label %bb25, label %bb22.preheader 46 47 bb30.loopexit: ; preds = %bb 48 %11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1] 49 br label %bb3 50 } 51 52 declare double @sin(double) nounwind readonly 53
