Lines Matching defs:PVT
9981 MVT PVT = getPointerTy(MF->getDataLayout());
9982 assert((PVT == MVT::i64 || PVT == MVT::i32) &&
10025 const int64_t LabelOffset = 1 * PVT.getStoreSize();
10026 const int64_t TOCOffset = 3 * PVT.getStoreSize();
10027 const int64_t BPOffset = 4 * PVT.getStoreSize();
10030 const TargetRegisterClass *PtrRC = getRegClassFor(PVT);
10118 MVT PVT = getPointerTy(MF->getDataLayout());
10119 assert((PVT == MVT::i64 || PVT == MVT::i32) &&
10123 (PVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass;
10126 unsigned FP = (PVT == MVT::i64) ? PPC::X31 : PPC::R31;
10127 unsigned SP = (PVT == MVT::i64) ? PPC::X1 : PPC::R1;
10129 (PVT == MVT::i64)
10136 const int64_t LabelOffset = 1 * PVT.getStoreSize();
10137 const int64_t SPOffset = 2 * PVT.getStoreSize();
10138 const int64_t TOCOffset = 3 * PVT.getStoreSize();
10139 const int64_t BPOffset = 4 * PVT.getStoreSize();
10146 PVT == MVT::i64) {
10158 if (PVT == MVT::i64) {
10170 if (PVT == MVT::i64) {
10182 if (PVT == MVT::i64) {
10194 if (PVT == MVT::i64 && Subtarget.isSVR4ABI()) {
10205 TII->get(PVT == MVT::i64 ? PPC::MTCTR8 : PPC::MTCTR)).addReg(Tmp);
10206 BuildMI(*MBB, MI, DL, TII->get(PVT == MVT::i64 ? PPC::BCTR8 : PPC::BCTR));
