Lines Matching refs:Shifted
8002 // Figure out what shift amount will be used by altivec if shifted by i in
9916 // For unsigned comparisons, we can directly compare the shifted values.
11134 auto Shifted = DAG.getNode(ISD::SRL, DL, MVT::i64, SubNode,
11136 auto Final = Shifted;
11140 Final = DAG.getNode(ISD::XOR, DL, MVT::i64, Shifted,
12513 // it need to be shifted to the right side before STBRX.
13437 case 'L': // "L" is a signed 16-bit constant shifted left 16 bits.
