Cross Reference: /external/u-boot/drivers/spi/xilinx

Lines Matching refs:regs
105 	struct xilinx_spi_regs *regs;
114 	struct xilinx_spi_regs *regs = priv->regs;
116 	priv->regs = (struct xilinx_spi_regs *)xilinx_spi_base_list[bus->seq];
118 	writel(SPISSR_RESET_VALUE, &regs->srr);
127 	struct xilinx_spi_regs *regs = priv->regs;
129 	writel(SPISSR_ACT(cs), &regs->spissr);
136 	struct xilinx_spi_regs *regs = priv->regs;
138 	writel(SPISSR_OFF, &regs->spissr);
145 	struct xilinx_spi_regs *regs = priv->regs;
147 	writel(SPISSR_OFF, &regs->spissr);
148 	writel(XILSPI_SPICR_DFLT_ON, &regs->spicr);
157 	struct xilinx_spi_regs *regs = priv->regs;
159 	writel(SPISSR_OFF, &regs->spissr);
160 	writel(XILSPI_SPICR_DFLT_OFF, &regs->spicr);
170 	struct xilinx_spi_regs *regs = priv->regs;
193 	while (rxecount && !(readl(&regs->spisr) & SPISR_RX_EMPTY)) {
194 		readl(&regs->spidrr);
217 		writel(d & SPIDTR_8BIT_MASK, &regs->spidtr);
218 		while (timeout && readl(&regs->spisr)
230 		d = readl(&regs->spidrr) & SPIDRR_8BIT_MASK;
249 	debug("xilinx_spi_set_speed: regs=%p, speed=%d\n", priv->regs,
258 	struct xilinx_spi_regs *regs = priv->regs;
261 	spicr = readl(&regs->spicr);
271 	writel(spicr, &regs->spicr);
274 	debug("xilinx_spi_set_mode: regs=%p, mode=%d\n", priv->regs,
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