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Searched
defs:CONFIG_SYS_FLASH_BASE_PHYS
(Results
1 - 25
of
30
) sorted by null
1
2
/external/u-boot/include/configs/
ls2080a_common.h
108
*
CONFIG_SYS_FLASH_BASE_PHYS
has the final address (IFC view)
114
#define
CONFIG_SYS_FLASH_BASE_PHYS
0x80000000
ls1043a_common.h
129
*
CONFIG_SYS_FLASH_BASE_PHYS
has the final address (IFC view)
134
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
ls1088a_common.h
101
*
CONFIG_SYS_FLASH_BASE_PHYS
has the final address (IFC view)
107
#define
CONFIG_SYS_FLASH_BASE_PHYS
0x80000000
P1023RDB.h
90
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
92
#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) \
t4qds.h
86
#define
CONFIG_SYS_FLASH_BASE_PHYS
(0xf00000000ull | CONFIG_SYS_FLASH_BASE)
C29XPCIE.h
147
#define
CONFIG_SYS_FLASH_BASE_PHYS
(0xf00000000ull | CONFIG_SYS_FLASH_BASE)
149
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
158
#define CONFIG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
MPC8548CDS.h
149
#define
CONFIG_SYS_FLASH_BASE_PHYS
0xfff000000ull
151
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
155
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x800000) | BR_PS_16 | BR_V)
157
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | BR_PS_16 | BR_V)
163
{
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x800000,
CONFIG_SYS_FLASH_BASE_PHYS
}
MPC8569MDS.h
125
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
P1022DS.h
192
#define
CONFIG_SYS_FLASH_BASE_PHYS
0xfe8000000ull
194
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
198
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | BR_PS_16 | BR_V)
209
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
UCP1020.h
209
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
211
#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) \
216
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
ls1021aqds.h
122
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
125
#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
130
#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
\
165
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
, \
166
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000}
ls1021atwr.h
120
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
123
#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
157
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
ls1046aqds.h
105
*
CONFIG_SYS_FLASH_BASE_PHYS
has the final address (IFC view)
110
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
144
#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
149
#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
\
177
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
, \
178
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000}
p1_twr.h
134
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
136
#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR((
CONFIG_SYS_FLASH_BASE_PHYS
)) \
152
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
B4860QDS.h
226
#define
CONFIG_SYS_FLASH_BASE_PHYS
(0xf00000000ull | CONFIG_SYS_FLASH_BASE)
228
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
232
#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
\
238
#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
266
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
\
267
+ 0x8000000,
CONFIG_SYS_FLASH_BASE_PHYS
}
BSC9132QDS.h
212
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
232
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
MPC8536DS.h
157
#define
CONFIG_SYS_FLASH_BASE_PHYS
0xfe0000000ull
159
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
163
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000) | BR_PS_16 | BR_V)
167
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) \
171
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000, \
172
CONFIG_SYS_FLASH_BASE_PHYS
}
MPC8572DS.h
152
#define
CONFIG_SYS_FLASH_BASE_PHYS
0xfe0000000ull
154
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
158
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000) | BR_PS_16 | BR_V)
161
#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | BR_PS_16 | BR_V)
164
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000,
CONFIG_SYS_FLASH_BASE_PHYS
}
MPC8641HPCN.h
152
#define
CONFIG_SYS_FLASH_BASE_PHYS
\
156
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
158
#define CONFIG_SYS_BR0_PRELIM (BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) \
P1010RDB.h
293
#define
CONFIG_SYS_FLASH_BASE_PHYS
(0xf00000000ull | CONFIG_SYS_FLASH_BASE)
295
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
298
#define CONFIG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
315
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
P2041RDB.h
169
#define
CONFIG_SYS_FLASH_BASE_PHYS
0xfe0000000ull
171
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
175
(BR_PHYS_ADDR((
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000)) | \
258
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000}
T102xRDB.h
267
#define
CONFIG_SYS_FLASH_BASE_PHYS
(0xf00000000ull | CONFIG_SYS_FLASH_BASE)
269
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
273
#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
307
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
}
T1040QDS.h
165
#define
CONFIG_SYS_FLASH_BASE_PHYS
(0xf00000000ull | CONFIG_SYS_FLASH_BASE)
168
#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
\
174
#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
208
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
\
209
+ 0x8000000,
CONFIG_SYS_FLASH_BASE_PHYS
}
T4240RDB.h
126
#define
CONFIG_SYS_FLASH_BASE_PHYS
(0xf00000000ull | CONFIG_SYS_FLASH_BASE)
344
#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
\
350
#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | \
379
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
\
380
+ 0x8000000,
CONFIG_SYS_FLASH_BASE_PHYS
}
corenet_ds.h
177
#define
CONFIG_SYS_FLASH_BASE_PHYS
0xfe0000000ull
179
#define
CONFIG_SYS_FLASH_BASE_PHYS
CONFIG_SYS_FLASH_BASE
183
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000) \
189
(BR_PHYS_ADDR(
CONFIG_SYS_FLASH_BASE_PHYS
) | BR_PS_16 | BR_V)
267
#define CONFIG_SYS_FLASH_BANKS_LIST {
CONFIG_SYS_FLASH_BASE_PHYS
+ 0x8000000,
CONFIG_SYS_FLASH_BASE_PHYS
}
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