/external/libunwind/src/ia64/ |
getcontext.S | 30 #define FR(n) (SC_FR + (n)*16) 57 add r3 = FR(2), in0 62 add r8 = FR(16), in0 67 add r9 = FR(24), in0 76 stf.spill [r9] = f24, (FR(31) - FR(24)) // M2 127 add r8 = FR(3), in0 131 stf.spill [r8] = f3, (FR(4) - FR(3)) // M3 132 add r9 = FR(5), in [all...] |
/external/llvm/lib/Target/Hexagon/ |
RDFCopy.cpp | 184 auto FR = EM.find(DR); 185 if (FR == EM.end()) 187 RegisterRef SR = FR->second;
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HexagonEarlyIfConv.cpp | 781 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; 789 FR = RO.getReg(), FSR = RO.getSubReg(); 797 else if (FR == 0) 798 FR = SR, FSR = SSR; 799 assert(TR && FR); 815 .addReg(FR, 0, FSR); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
RDFCopy.cpp | 147 auto FR = EM.find(DR); 148 if (FR == EM.end()) 150 RegisterRef SR = FR->second;
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HexagonEarlyIfConv.cpp | 205 unsigned TSR, unsigned FR, unsigned FSR); 781 unsigned PredR, unsigned TR, unsigned TSR, unsigned FR, unsigned FSR) { 808 .addReg(FR, 0, FSR); 820 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; 828 FR = RO.getReg(), FSR = RO.getSubReg(); 836 else if (FR == 0) 837 FR = SR, FSR = SSR; 839 assert(TR || FR); 842 if (TR && FR) { 846 FP.PredR, TR, TSR, FR, FSR) [all...] |
/external/libphonenumber/libphonenumber/test/com/google/i18n/phonenumbers/ |
RegionCode.java | 43 static final String FR = "FR";
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/external/llvm/lib/CodeGen/ |
LocalStackSlotAllocation.cpp | 331 FrameRef &FR = FrameReferenceInsns[ref]; 332 MachineInstr &MI = *FR.getMachineInstr(); 333 int64_t LocalOffset = FR.getLocalOffset(); 334 int FrameIdx = FR.getFrameIndex();
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/external/swiftshader/third_party/LLVM/lib/Analysis/IPA/ |
GlobalsModRef.cpp | 126 if (FunctionRecord *FR = getFunctionInfo(F)) { 127 if (FR->FunctionEffect == 0) 129 else if ((FR->FunctionEffect & Mod) == 0) 143 if (FunctionRecord *FR = getFunctionInfo(F)) { 144 if (FR->FunctionEffect == 0) 146 else if ((FR->FunctionEffect & Mod) == 0) 385 FunctionRecord &FR = FunctionInfo[SCC[0]->getFunction()]; 408 FR.MayReadAnyGlobal = true; 429 FR.GlobalInfo[GI->first] |= GI->second; 430 FR.MayReadAnyGlobal |= CalleeFR->MayReadAnyGlobal [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
LocalStackSlotAllocation.cpp | 340 FrameRef &FR = FrameReferenceInsns[ref]; 341 MachineInstr &MI = *FR.getMachineInstr(); 342 int64_t LocalOffset = FR.getLocalOffset(); 343 int FrameIdx = FR.getFrameIndex();
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/external/clang/lib/StaticAnalyzer/Checkers/ |
CallAndMessageChecker.cpp | 242 const FieldRegion *FR = MrMgr.getFieldRegion(I, R); 246 if (Find(FR)) 250 const SVal &V = StoreMgr.getBinding(store, loc::MemRegionVal(FR));
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MallocChecker.cpp | [all...] |
/external/icu/icu4c/source/test/intltest/ |
svccoll.cpp | 38 const Locale& FR = Locale::getFrance(); 44 Collator* frcol = Collator::createInstance(FR, status); 94 frcol = Collator::createInstance(FR, status); 108 errln("register of fr collator for fu_FU failed"); 462 // ja, fr, ge collators no longer valid
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
ARCISelLowering.cpp | 742 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); 744 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1),
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/external/clang/lib/Sema/ |
Sema.cpp | [all...] |
/external/clang/lib/StaticAnalyzer/Core/ |
MemRegion.cpp | 677 const FieldRegion *const FR = dyn_cast<FieldRegion>(this); 681 if (FR) { 682 return FR->getDecl()->getSourceRange(); [all...] |
RegionStore.cpp | 749 static inline bool isUnionField(const FieldRegion *FR) { 750 return FR->getDecl()->getParent()->isUnion(); 762 if (const FieldRegion *FR = dyn_cast<FieldRegion>(R)) 763 if (!isUnionField(FR)) 764 Fields.push_back(FR->getDecl()); 819 } else if (const FieldRegion *FR = dyn_cast<FieldRegion>(Top)) { 820 if (FR->getDecl()->isBitField()) 821 Length = FR->getDecl()->getBitWidthValue(SVB.getContext()); [all...] |
BugReporter.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
AlphaISelLowering.cpp | 757 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsBase(), MVT::i64); 758 SDValue S1 = DAG.getStore(Chain, dl, FR, VAListP, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
AMDGPUCodeGenPrepare.cpp | 568 // float fr = mad(fqneg, fb, fa); 569 Value *FR = Builder.CreateIntrinsic(Intrinsic::amdgcn_fmad_ftz, 576 // fr = fabs(fr); 577 FR = Builder.CreateIntrinsic(Intrinsic::fabs, { FR }, FQ); 582 // int cv = fr >= fb; 583 Value *CV = Builder.CreateFCmpOGE(FR, FB);
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/external/ImageMagick/coders/ |
wmf.c | [all...] |
/external/pcre/dist2/src/sljit/ |
sljitNativeMIPS_common.c | 102 #define FR(dr) (freg_map[dr]) [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ProfileData/Coverage/ |
CoverageMapping.h | 315 FunctionRecord(FunctionRecord &&FR) = default;
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |