1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS 17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 */ 26 27 /** 28 **************************************************************************************************** 29 * @file egbaddrlib.h 30 * @brief Contains the EgBasedLib class definition. 31 **************************************************************************************************** 32 */ 33 34 #ifndef __EG_BASED_ADDR_LIB_H__ 35 #define __EG_BASED_ADDR_LIB_H__ 36 37 #include "addrlib1.h" 38 39 namespace Addr 40 { 41 namespace V1 42 { 43 /// Structures for functions 44 struct CoordFromBankPipe 45 { 46 UINT_32 xBits : 3; 47 UINT_32 yBits : 4; 48 49 UINT_32 xBit3 : 1; 50 UINT_32 xBit4 : 1; 51 UINT_32 xBit5 : 1; 52 UINT_32 yBit3 : 1; 53 UINT_32 yBit4 : 1; 54 UINT_32 yBit5 : 1; 55 UINT_32 yBit6 : 1; 56 }; 57 58 /** 59 **************************************************************************************************** 60 * @brief This class is the Evergreen based address library 61 * @note Abstract class 62 **************************************************************************************************** 63 */ 64 class EgBasedLib : public Lib 65 { 66 protected: 67 EgBasedLib(const Client* pClient); 68 virtual ~EgBasedLib(); 69 70 public: 71 72 /// Surface info functions 73 74 // NOTE: DispatchComputeSurfaceInfo using TileInfo takes both an input and an output. 75 // On input: 76 // One or more fields may be 0 to be calculated/defaulted - pre-SI h/w. 77 // H/W using tile mode index only accepts none or all 0's - SI and newer h/w. 78 // It then returns the actual tiling configuration used. 79 // Other methods' TileInfo must be valid on entry 80 BOOL_32 DispatchComputeSurfaceInfo( 81 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 82 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 83 84 ADDR_E_RETURNCODE DispatchComputeFmaskInfo( 85 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 86 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); 87 88 protected: 89 // Hwl interface 90 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( 91 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 92 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 93 94 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( 95 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 96 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 97 98 virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( 99 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 100 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; 101 102 virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( 103 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, 104 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; 105 106 virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( 107 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, 108 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; 109 110 virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( 111 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, 112 UINT_64 baseAddr, UINT_32* pTileSwizzle) const; 113 114 virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( 115 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, 116 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; 117 118 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( 119 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 120 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; 121 122 virtual UINT_32 HwlComputeHtileBpp( 123 BOOL_32 isWidth8, BOOL_32 isHeight8) const; 124 125 virtual UINT_32 HwlComputeHtileBaseAlign( 126 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const; 127 128 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( 129 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 130 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); 131 132 virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( 133 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 134 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 135 136 virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( 137 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 138 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; 139 140 virtual BOOL_32 HwlGetAlignmentInfoMacroTiled( 141 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 142 UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const; 143 144 virtual UINT_32 HwlComputeQbStereoRightSwizzle( 145 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pInfo) const; 146 147 virtual VOID HwlComputePixelCoordFromOffset( 148 UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, 149 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 150 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, 151 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; 152 153 /// Return Cmask block max 154 virtual BOOL_32 HwlGetMaxCmaskBlockMax() const 155 { 156 return 0x3FFF; // 14 bits, 0n16383 157 } 158 159 // Sub-hwl interface 160 /// Pure virtual function to setup tile info (indices) if client requests to do so 161 virtual VOID HwlSetupTileInfo( 162 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags, 163 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 164 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo, 165 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 166 167 /// Pure virtual function to get pitch alignment for linear modes 168 virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const = 0; 169 170 /// Pure virtual function to get size adjustment for linear modes 171 virtual UINT_64 HwlGetSizeAdjustmentLinear( 172 AddrTileMode tileMode, 173 UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign, 174 UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const = 0; 175 176 virtual UINT_32 HwlGetPitchAlignmentMicroTiled( 177 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const; 178 179 virtual UINT_64 HwlGetSizeAdjustmentMicroTiled( 180 UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 181 UINT_32 baseAlign, UINT_32 pitchAlign, 182 UINT_32 *pPitch, UINT_32 *pHeight) const; 183 184 /// Pure virtual function to do extra sanity check 185 virtual BOOL_32 HwlSanityCheckMacroTiled( 186 ADDR_TILEINFO* pTileInfo) const = 0; 187 188 /// Pure virtual function to check current level to be the last macro tiled one 189 virtual VOID HwlCheckLastMacroTiledLvl( 190 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 191 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 192 193 /// Adjusts bank before bank is modified by rotation 194 virtual UINT_32 HwlPreAdjustBank( 195 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0; 196 197 virtual VOID HwlComputeSurfaceCoord2DFromBankPipe( 198 AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice, 199 UINT_32 bank, UINT_32 pipe, 200 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, 201 BOOL_32 ignoreSE, 202 ADDR_TILEINFO* pTileInfo) const = 0; 203 204 virtual BOOL_32 HwlTileInfoEqual( 205 const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const; 206 207 virtual AddrTileMode HwlDegradeThickTileMode( 208 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const; 209 210 virtual INT_32 HwlPostCheckTileIndex( 211 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type, 212 INT curIndex = TileIndexInvalid) const 213 { 214 return TileIndexInvalid; 215 } 216 217 virtual VOID HwlFmaskPreThunkSurfInfo( 218 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn, 219 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut, 220 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn, 221 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const 222 { 223 } 224 225 virtual VOID HwlFmaskPostThunkSurfInfo( 226 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut, 227 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const 228 { 229 } 230 231 virtual UINT_32 HwlStereoCheckRightOffsetPadding(ADDR_TILEINFO* pTileInfo) const; 232 233 virtual BOOL_32 HwlReduceBankWidthHeight( 234 UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples, 235 UINT_32 bankHeightAlign, UINT_32 pipes, 236 ADDR_TILEINFO* pTileInfo) const; 237 238 // Protected non-virtual functions 239 240 /// Mip level functions 241 AddrTileMode ComputeSurfaceMipLevelTileMode( 242 AddrTileMode baseTileMode, UINT_32 bpp, 243 UINT_32 pitch, UINT_32 height, UINT_32 numSlices, UINT_32 numSamples, 244 UINT_32 pitchAlign, UINT_32 heightAlign, 245 ADDR_TILEINFO* pTileInfo) const; 246 247 /// Swizzle functions 248 VOID ExtractBankPipeSwizzle( 249 UINT_32 base256b, ADDR_TILEINFO* pTileInfo, 250 UINT_32* pBankSwizzle, UINT_32* pPipeSwizzle) const; 251 252 UINT_32 GetBankPipeSwizzle( 253 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, 254 UINT_64 baseAddr, ADDR_TILEINFO* pTileInfo) const; 255 256 UINT_32 ComputeSliceTileSwizzle( 257 AddrTileMode tileMode, UINT_32 baseSwizzle, UINT_32 slice, UINT_64 baseAddr, 258 ADDR_TILEINFO* pTileInfo) const; 259 260 /// Addressing functions 261 virtual ADDR_E_RETURNCODE ComputeBankEquation( 262 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, 263 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const 264 { 265 return ADDR_NOTSUPPORTED; 266 } 267 268 UINT_32 ComputeBankFromCoord( 269 UINT_32 x, UINT_32 y, UINT_32 slice, 270 AddrTileMode tileMode, UINT_32 bankSwizzle, UINT_32 tileSpitSlice, 271 ADDR_TILEINFO* pTileInfo) const; 272 273 UINT_32 ComputeBankFromAddr( 274 UINT_64 addr, UINT_32 numBanks, UINT_32 numPipes) const; 275 276 UINT_32 ComputePipeRotation( 277 AddrTileMode tileMode, UINT_32 numPipes) const; 278 279 UINT_32 ComputeBankRotation( 280 AddrTileMode tileMode, UINT_32 numBanks, 281 UINT_32 numPipes) const; 282 283 VOID ComputeSurfaceCoord2DFromBankPipe( 284 AddrTileMode tileMode, UINT_32 x, UINT_32 y, UINT_32 slice, 285 UINT_32 bank, UINT_32 pipe, 286 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices, 287 ADDR_TILEINFO* pTileInfo, 288 CoordFromBankPipe *pOutput) const; 289 290 /// Htile/Cmask functions 291 UINT_64 ComputeHtileBytes( 292 UINT_32 pitch, UINT_32 height, UINT_32 bpp, 293 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* sliceBytes, UINT_32 baseAlign) const; 294 295 ADDR_E_RETURNCODE ComputeMacroTileEquation( 296 UINT_32 log2BytesPP, AddrTileMode tileMode, AddrTileType microTileType, 297 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const; 298 299 // Static functions 300 static BOOL_32 IsTileInfoAllZero(const ADDR_TILEINFO* pTileInfo); 301 static UINT_32 ComputeFmaskNumPlanesFromNumSamples(UINT_32 numSamples); 302 static UINT_32 ComputeFmaskResolvedBppFromNumSamples(UINT_32 numSamples); 303 304 virtual VOID HwlComputeSurfaceAlignmentsMacroTiled( 305 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 306 UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const 307 { 308 } 309 310 private: 311 312 BOOL_32 ComputeSurfaceInfoLinear( 313 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 314 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, 315 UINT_32 padDims) const; 316 317 BOOL_32 ComputeSurfaceInfoMicroTiled( 318 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 319 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, 320 UINT_32 padDims, 321 AddrTileMode expTileMode) const; 322 323 BOOL_32 ComputeSurfaceInfoMacroTiled( 324 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 325 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut, 326 UINT_32 padDims, 327 AddrTileMode expTileMode) const; 328 329 BOOL_32 ComputeSurfaceAlignmentsLinear( 330 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 331 UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; 332 333 BOOL_32 ComputeSurfaceAlignmentsMicroTiled( 334 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 335 UINT_32 mipLevel, UINT_32 numSamples, 336 UINT_32* pBaseAlign, UINT_32* pPitchAlign, UINT_32* pHeightAlign) const; 337 338 BOOL_32 ComputeSurfaceAlignmentsMacroTiled( 339 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 340 UINT_32 mipLevel, UINT_32 numSamples, 341 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 342 343 /// Surface addressing functions 344 UINT_64 DispatchComputeSurfaceAddrFromCoord( 345 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 346 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 347 348 VOID DispatchComputeSurfaceCoordFromAddr( 349 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 350 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; 351 352 UINT_64 ComputeSurfaceAddrFromCoordMicroTiled( 353 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, 354 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 355 AddrTileMode tileMode, 356 AddrTileType microTileType, BOOL_32 isDepthSampleOrder, 357 UINT_32* pBitPosition) const; 358 359 UINT_64 ComputeSurfaceAddrFromCoordMacroTiled( 360 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, 361 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 362 AddrTileMode tileMode, 363 AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, 364 UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 365 ADDR_TILEINFO* pTileInfo, 366 UINT_32* pBitPosition) const; 367 368 VOID ComputeSurfaceCoordFromAddrMacroTiled( 369 UINT_64 addr, UINT_32 bitPosition, 370 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 371 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 372 AddrTileType microTileType, BOOL_32 ignoreSE, BOOL_32 isDepthSampleOrder, 373 UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 374 ADDR_TILEINFO* pTileInfo, 375 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; 376 377 /// Fmask functions 378 UINT_64 DispatchComputeFmaskAddrFromCoord( 379 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 380 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 381 382 VOID DispatchComputeFmaskCoordFromAddr( 383 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 384 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; 385 386 // FMASK related methods - private 387 UINT_64 ComputeFmaskAddrFromCoordMicroTiled( 388 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, 389 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, 390 BOOL_32 resolved, UINT_32* pBitPosition) const; 391 392 VOID ComputeFmaskCoordFromAddrMicroTiled( 393 UINT_64 addr, UINT_32 bitPosition, 394 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 395 AddrTileMode tileMode, BOOL_32 resolved, 396 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; 397 398 VOID ComputeFmaskCoordFromAddrMacroTiled( 399 UINT_64 addr, UINT_32 bitPosition, 400 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, AddrTileMode tileMode, 401 UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 402 BOOL_32 ignoreSE, 403 ADDR_TILEINFO* pTileInfo, 404 BOOL_32 resolved, 405 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, UINT_32* pPlane) const; 406 407 UINT_64 ComputeFmaskAddrFromCoordMacroTiled( 408 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, UINT_32 plane, 409 UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 410 AddrTileMode tileMode, UINT_32 pipeSwizzle, UINT_32 bankSwizzle, 411 BOOL_32 ignoreSE, 412 ADDR_TILEINFO* pTileInfo, 413 BOOL_32 resolved, 414 UINT_32* pBitPosition) const; 415 416 /// Sanity check functions 417 BOOL_32 SanityCheckMacroTiled( 418 ADDR_TILEINFO* pTileInfo) const; 419 420 protected: 421 UINT_32 m_ranks; ///< Number of ranks - MC_ARB_RAMCFG.NOOFRANK 422 UINT_32 m_logicalBanks; ///< Logical banks = m_banks * m_ranks if m_banks != 16 423 UINT_32 m_bankInterleave; ///< Bank interleave, as a multiple of pipe interleave size 424 }; 425 426 } // V1 427 } // Addr 428 429 #endif 430 431
