| /external/llvm/include/llvm/CodeGen/ |
| LivePhysRegs.h | 45 SparseSet<unsigned> LiveRegs;
51 LivePhysRegs() : TRI(nullptr), LiveRegs() {}
56 LiveRegs.setUniverse(TRI->getNumRegs());
63 LiveRegs.clear();
64 LiveRegs.setUniverse(TRI->getNumRegs());
68 void clear() { LiveRegs.clear(); }
71 bool empty() const { return LiveRegs.empty(); }
79 LiveRegs.insert(*SubRegs);
88 LiveRegs.erase(*R);
100 bool contains(unsigned Reg) const { return LiveRegs.count(Reg);
[all...] |
| ScheduleDAGInstrs.h | 233 BitVector LiveRegs;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| LivePhysRegs.h | 51 SparseSet<unsigned> LiveRegs;
59 LiveRegs.setUniverse(TRI.getNumRegs());
68 LiveRegs.clear();
69 LiveRegs.setUniverse(TRI.getNumRegs());
73 void clear() { LiveRegs.clear(); }
76 bool empty() const { return LiveRegs.empty(); }
84 LiveRegs.insert(*SubRegs);
93 LiveRegs.erase(*R);
106 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); }
148 const_iterator begin() const { return LiveRegs.begin();
[all...] |
| ScheduleDAGInstrs.h | 247 LivePhysRegs LiveRegs;
|
| /external/llvm/lib/CodeGen/ |
| StackMapLivenessAnalysis.cpp | 53 LivePhysRegs LiveRegs;
129 LiveRegs.init(TRI);
131 LiveRegs.addLiveOutsNoPristines(MBB);
142 DEBUG(dbgs() << " " << LiveRegs << " " << *I);
143 LiveRegs.stepBackward(*I);
165 for (auto Reg : LiveRegs)
|
| BranchFolding.h | 106 LivePhysRegs LiveRegs;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| StackMapLivenessAnalysis.cpp | 52 LivePhysRegs LiveRegs;
128 LiveRegs.init(*TRI);
130 LiveRegs.addLiveOutsNoPristines(MBB);
141 LLVM_DEBUG(dbgs() << " " << LiveRegs << " " << *I);
142 LiveRegs.stepBackward(*I);
164 for (auto Reg : LiveRegs)
|
| LivePhysRegs.cpp | 33 SparseSet<unsigned>::iterator LRI = LiveRegs.begin();
34 while (LRI != LiveRegs.end()) {
38 LRI = LiveRegs.erase(LRI);
146 if (LiveRegs.count(Reg))
151 if (LiveRegs.count(*R))
157 /// Add live-in registers of basic block \p MBB to \p LiveRegs.
176 /// Adds all callee saved registers to \p LiveRegs.
177 static void addCalleeSavedRegs(LivePhysRegs &LiveRegs,
181 LiveRegs.addReg(*CSR);
247 void llvm::computeLiveIns(LivePhysRegs &LiveRegs,
[all...] |
| BranchFolding.h | 132 LivePhysRegs LiveRegs;
|
| BranchRelaxation.cpp | 86 LivePhysRegs LiveRegs;
274 computeAndAddLiveIns(LiveRegs, *NewBB);
339 computeAndAddLiveIns(LiveRegs, *NewBB);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZShortenInst.cpp | 53 LivePhysRegs LiveRegs;
90 if (LiveRegs.contains(OtherReg))
145 if (!LiveRegs.contains(SystemZ::CC) && shortenOn001(MI, Opcode)) {
184 LiveRegs.clear();
185 LiveRegs.addLiveOuts(MBB);
265 LiveRegs.stepBackward(MI);
278 LiveRegs.init(TRI);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| SystemZShortenInst.cpp | 53 LivePhysRegs LiveRegs;
90 if (LiveRegs.contains(OtherReg))
145 if (!LiveRegs.contains(SystemZ::CC) && shortenOn001(MI, Opcode)) {
184 LiveRegs.clear();
185 LiveRegs.addLiveOuts(MBB);
305 LiveRegs.stepBackward(MI);
318 LiveRegs.init(*TRI);
|
| /external/llvm/lib/Target/X86/ |
| X86FixupBWInsts.cpp | 144 LivePhysRegs LiveRegs;
161 LiveRegs.init(&TII->getRegisterInfo());
199 if (LiveRegs.contains(SuperDestReg))
209 if (LiveRegs.contains(UpperByteReg))
341 LiveRegs.clear();
343 LiveRegs.addLiveOuts(MBB);
359 LiveRegs.stepBackward(*MI);
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| ExecutionDepsFix.cpp | 117 DomainValue **LiveRegs;
145 // LiveRegs manipulations.
184 /// Set LiveRegs[rx] = dv, updating reference counts.
187 if (!LiveRegs) {
188 LiveRegs = new DomainValue*[NumRegs];
189 std::fill(LiveRegs, LiveRegs+NumRegs, (DomainValue*)0);
192 if (LiveRegs[rx] == dv)
194 if (LiveRegs[rx]) {
195 assert(LiveRegs[rx]->Refs && "Bad refcount")
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86FixupBWInsts.cpp | 139 LivePhysRegs LiveRegs;
156 LiveRegs.init(TII->getRegisterInfo());
192 if (!LiveRegs.contains(SuperDestReg)) {
200 if (!LiveRegs.contains(getX86SubSuperRegister(OrigDestReg, 16)) &&
201 !LiveRegs.contains(getX86SubSuperRegister(SuperDestReg, 8,
386 LiveRegs.clear();
388 LiveRegs.addLiveOuts(MBB);
397 LiveRegs.stepBackward(*MI);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| GCNRegPressure.h | 102 LiveRegSet LiveRegs;
114 const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; }
126 decltype(LiveRegs) moveLiveRegs() {
127 return std::move(LiveRegs);
130 static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
140 void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
164 bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
208 Range &&LiveRegs) {
210 for (const auto &RM : LiveRegs)
[all...] |
| SIMachineScheduler.h | 329 std::set<unsigned> LiveRegs;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| MipsExpandPseudo.cpp | 192 LivePhysRegs LiveRegs;
193 computeAndAddLiveIns(LiveRegs, *loop1MBB);
194 computeAndAddLiveIns(LiveRegs, *loop2MBB);
195 computeAndAddLiveIns(LiveRegs, *sinkMBB);
196 computeAndAddLiveIns(LiveRegs, *exitMBB);
293 LivePhysRegs LiveRegs;
294 computeAndAddLiveIns(LiveRegs, *loop1MBB);
295 computeAndAddLiveIns(LiveRegs, *loop2MBB);
296 computeAndAddLiveIns(LiveRegs, *exitMBB);
472 LivePhysRegs LiveRegs;
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64ExpandPseudoInsts.cpp | 656 LivePhysRegs LiveRegs;
657 computeAndAddLiveIns(LiveRegs, *DoneBB);
658 computeAndAddLiveIns(LiveRegs, *StoreBB);
659 computeAndAddLiveIns(LiveRegs, *LoadCmpBB);
662 computeAndAddLiveIns(LiveRegs, *StoreBB);
664 computeAndAddLiveIns(LiveRegs, *LoadCmpBB);
749 LivePhysRegs LiveRegs;
750 computeAndAddLiveIns(LiveRegs, *DoneBB);
751 computeAndAddLiveIns(LiveRegs, *StoreBB);
752 computeAndAddLiveIns(LiveRegs, *LoadCmpBB)
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIMachineScheduler.h | 319 std::set<unsigned> LiveRegs;
|
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 93 LivePhysRegs LiveRegs;
558 if (!LiveRegs.contains(Reg))
570 LiveRegs.init(TRI);
571 LiveRegs.addLiveOuts(MBB);
578 LiveRegs.stepBackward(*LiveRegPos);
662 LiveRegs.addReg(R.first);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | [all...] |
| ARMLoadStoreOptimizer.cpp | 109 LivePhysRegs LiveRegs;
587 if (!LiveRegs.contains(Reg))
599 LiveRegs.init(*TRI);
600 LiveRegs.addLiveOuts(MBB);
607 LiveRegs.stepBackward(*LiveRegPos);
690 LiveRegs.addReg(R.first);
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceCfgNode.cpp | [all...] |
