| /external/swiftshader/third_party/LLVM/lib/MC/MCDisassembler/ |
| EDOperand.h | 39 unsigned int OpIndex;
47 /// @arg opIndex - The index of the operand in inst
51 unsigned int opIndex,
|
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/InstPrinter/ |
| PTXInstPrinter.cpp | 61 int OpIndex;
65 OpIndex = 1;
68 OpIndex = MI->getNumOperands()-1;
71 int PredOp = MI->getOperand(OpIndex).getImm();
|
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
| MCInstrDescView.cpp | 23 unsigned OpIndex = 0;
24 for (; OpIndex < MCInstrDesc.getNumOperands(); ++OpIndex) {
25 const auto &OpInfo = MCInstrDesc.opInfo_begin()[OpIndex];
27 Operand.Index = OpIndex;
28 Operand.IsDef = (OpIndex < MCInstrDesc.getNumDefs());
34 MCInstrDesc.getOperandConstraint(OpIndex, llvm::MCOI::TIED_TO);
39 MCPhysReg && *MCPhysReg; ++MCPhysReg, ++OpIndex) {
41 Operand.Index = OpIndex;
49 MCPhysReg && *MCPhysReg; ++MCPhysReg, ++OpIndex) {
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| TypeBasedAliasAnalysis.cpp | 297 unsigned OpIndex = FirstFieldOpNo + FieldIndex * NumOpsPerField;
298 auto *TypeNode = cast<MDNode>(getNode()->getOperand(OpIndex));
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 511 unsigned OpIndex = HexagonMCInstrInfo::getNewValueOp(*MCII, MI);
512 MCOperand &MCO = MI.getOperand(OpIndex);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
| Instruction.h | 37 // a bitwise not of the OpIndex.
38 int OpIndex;
58 bool isImplicitWrite() const { return OpIndex < 0; };
65 // implicit read is the bitwise not of field OpIndex.
66 int OpIndex;
76 bool isImplicitRead() const { return OpIndex < 0; };
|
| /external/llvm/utils/TableGen/ |
| AsmWriterEmitter.cpp | 683 int OpIndex, PrintIndex;
684 std::tie(OpIndex, PrintIndex) = getOpData(Name);
687 OS << format("\\x%02X", (unsigned char)OpIndex + 1);
691 OS << format("\\xFF\\x%02X\\x%02X", OpIndex + 1, PrintIndex + 1);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| AsmWriterEmitter.cpp | 693 int OpIndex, PrintIndex;
694 std::tie(OpIndex, PrintIndex) = getOpData(Name);
697 OS << format("\\x%02X", (unsigned char)OpIndex + 1);
701 OS << format("\\xFF\\x%02X\\x%02X", OpIndex + 1, PrintIndex + 1);
[all...] |
| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 345 unsigned OpIndex = HexagonMCInstrInfo::getNewValueOp(*MCII, MI);
346 MCOperand &MCO = MI.getOperand(OpIndex);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
