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Searched
defs:PrintRegister
(Results
1 - 11
of
11
) sorted by null
/external/google-breakpad/src/processor/
stackwalk_common.cc
64
//
PrintRegister
prints a register's name and value to stdout. It will
67
// return value of
PrintRegister
.
70
// to
PrintRegister
.
72
static int
PrintRegister
(const char *name, uint32_t value, int start_col) {
296
sequence =
PrintRegister
("eip", frame_x86->context.eip, sequence);
298
sequence =
PrintRegister
("esp", frame_x86->context.esp, sequence);
300
sequence =
PrintRegister
("ebp", frame_x86->context.ebp, sequence);
302
sequence =
PrintRegister
("ebx", frame_x86->context.ebx, sequence);
304
sequence =
PrintRegister
("esi", frame_x86->context.esi, sequence);
306
sequence =
PrintRegister
("edi", frame_x86->context.edi, sequence)
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
HexagonGenPredicate.cpp
64
struct
PrintRegister
{
65
friend raw_ostream &operator<< (raw_ostream &OS, const
PrintRegister
&PR);
67
PrintRegister
(Register R, const TargetRegisterInfo &I) : Reg(R), TRI(I) {}
74
raw_ostream &operator<< (raw_ostream &OS, const
PrintRegister
&PR)
76
raw_ostream &operator<< (raw_ostream &OS, const
PrintRegister
&PR) {
252
LLVM_DEBUG(dbgs() << __func__ << ": " <<
PrintRegister
(Reg, *TRI));
260
LLVM_DEBUG(dbgs() << " -> " <<
PrintRegister
(PR, *TRI) << '\n');
276
LLVM_DEBUG(dbgs() << " -> !" <<
PrintRegister
(Register(NewPR), *TRI)
HexagonConstExtenders.cpp
416
friend struct
PrintRegister
;
421
const struct
PrintRegister
&P);
442
struct
PrintRegister
{
443
PrintRegister
(HCE::Register R, const HexagonRegisterInfo &I)
450
raw_ostream &operator<< (raw_ostream &OS, const
PrintRegister
&P) {
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/external/v8/src/ppc/
disasm-ppc.cc
68
void
PrintRegister
(int reg);
116
void Decoder::
PrintRegister
(int reg) {
156
PrintRegister
(reg);
160
PrintRegister
(reg);
164
PrintRegister
(reg);
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...]
/external/llvm/lib/Target/Hexagon/
HexagonGenPredicate.cpp
48
struct
PrintRegister
{
49
PrintRegister
(Register R, const TargetRegisterInfo &I) : Reg(R), TRI(I) {}
50
friend raw_ostream &operator<< (raw_ostream &OS, const
PrintRegister
&PR);
55
raw_ostream &operator<< (raw_ostream &OS, const
PrintRegister
&PR)
57
raw_ostream &operator<< (raw_ostream &OS, const
PrintRegister
&PR) {
233
DEBUG(dbgs() << LLVM_FUNCTION_NAME << ": " <<
PrintRegister
(Reg, *TRI));
241
DEBUG(dbgs() << " -> " <<
PrintRegister
(PR, *TRI) << '\n');
257
DEBUG(dbgs() << " -> !" <<
PrintRegister
(Register(NewPR), *TRI) << '\n');
/external/v8/src/s390/
disasm-s390.cc
66
void
PrintRegister
(int reg);
109
void Decoder::
PrintRegister
(int reg) {
146
PrintRegister
(reg);
154
PrintRegister
(reg);
157
PrintRegister
(reg);
162
PrintRegister
(reg);
166
PrintRegister
(reg);
170
PrintRegister
(reg);
174
PrintRegister
(reg);
178
PrintRegister
(reg)
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...]
/external/v8/src/arm/
disasm-arm.cc
75
void
PrintRegister
(int reg);
166
void Decoder::
PrintRegister
(int reg) {
198
PrintRegister
(rm);
221
PrintRegister
(rs);
307
PrintRegister
(reg);
311
PrintRegister
(reg);
315
PrintRegister
(reg);
319
PrintRegister
(reg);
323
PrintRegister
(reg);
334
PrintRegister
(reg)
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...]
/external/v8/src/mips/
disasm-mips.cc
67
void
PrintRegister
(int reg);
184
void Decoder::
PrintRegister
(int reg) {
191
PrintRegister
(reg);
197
PrintRegister
(reg);
203
PrintRegister
(reg);
654
PrintRegister
(reg);
658
PrintRegister
(reg);
662
PrintRegister
(reg);
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...]
/external/v8/src/mips64/
disasm-mips64.cc
68
void
PrintRegister
(int reg);
196
void Decoder::
PrintRegister
(int reg) {
203
PrintRegister
(reg);
209
PrintRegister
(reg);
215
PrintRegister
(reg);
695
PrintRegister
(reg);
699
PrintRegister
(reg);
703
PrintRegister
(reg);
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/external/v8/src/arm64/
simulator-arm64.cc
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/external/vixl/src/aarch64/
simulator-aarch64.cc
619
if (registers_[i].WrittenSinceLastLog())
PrintRegister
(i);
640
PrintRegister
(i);
720
void Simulator::
PrintRegister
(unsigned code, Reg31Mode r31mode) {
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