/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyFrameLowering.cpp | 88 const TargetRegisterClass *PtrRC = 90 unsigned Zero = MRI.createVirtualRegister(PtrRC); 91 unsigned Drop = MRI.createVirtualRegister(PtrRC); 138 const TargetRegisterClass *PtrRC = 140 unsigned Zero = MRI.createVirtualRegister(PtrRC); 141 unsigned SPReg = MRI.createVirtualRegister(PtrRC); 159 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); 198 const TargetRegisterClass *PtrRC = 200 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); 206 SPReg = MRI.createVirtualRegister(PtrRC); [all...] |
WebAssemblyRegisterInfo.cpp | 110 const TargetRegisterClass *PtrRC = 112 unsigned OffsetOp = MRI.createVirtualRegister(PtrRC); 116 FIRegOperand = MRI.createVirtualRegister(PtrRC);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
WebAssemblyRegisterInfo.cpp | 116 const TargetRegisterClass *PtrRC = 118 unsigned OffsetOp = MRI.createVirtualRegister(PtrRC); 122 FIRegOperand = MRI.createVirtualRegister(PtrRC);
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WebAssemblyFrameLowering.cpp | 147 const TargetRegisterClass *PtrRC = 151 SPReg = MRI.createVirtualRegister(PtrRC); 161 unsigned BasePtr = MRI.createVirtualRegister(PtrRC); 168 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); 177 unsigned BitmaskReg = MRI.createVirtualRegister(PtrRC); 222 const TargetRegisterClass *PtrRC = 224 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); 230 SPReg = MRI.createVirtualRegister(PtrRC);
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/external/llvm/lib/Target/Mips/ |
MipsSERegisterInfo.cpp | 179 const TargetRegisterClass *PtrRC = 182 unsigned Reg = RegInfo.createVirtualRegister(PtrRC);
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MipsSEFrameLowering.cpp | 567 const TargetRegisterClass *PtrRC = &Mips::GPR32RegClass; 594 MipsFI->getISRRegFI(0), PtrRC, 605 MipsFI->getISRRegFI(1), PtrRC, 731 const TargetRegisterClass *PtrRC = &Mips::GPR32RegClass; 739 MipsFI->getISRRegFI(0), PtrRC, 747 MipsFI->getISRRegFI(1), PtrRC, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
MipsSERegisterInfo.cpp | 225 const TargetRegisterClass *PtrRC = 228 unsigned Reg = RegInfo.createVirtualRegister(PtrRC);
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MipsSEFrameLowering.cpp | 592 const TargetRegisterClass *PtrRC = &Mips::GPR32RegClass; 619 MipsFI->getISRRegFI(0), PtrRC, 630 MipsFI->getISRRegFI(1), PtrRC, 755 const TargetRegisterClass *PtrRC = &Mips::GPR32RegClass; 763 MipsFI->getISRRegFI(0), PtrRC, 771 MipsFI->getISRRegFI(1), PtrRC, [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.cpp | 480 const TargetRegisterClass *PtrRC = 482 GlobalBaseReg = RegInfo.createVirtualRegister(PtrRC);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
SparcInstrInfo.cpp | 484 const TargetRegisterClass *PtrRC = 486 GlobalBaseReg = RegInfo.createVirtualRegister(PtrRC);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGISel.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGISel.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |