| /external/llvm/lib/Analysis/ |
| ScalarEvolutionNormalization.cpp | 217 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace);
218 if (LO != LN || RO != RN)
219 return SE.getUDivExpr(LN, RN);
|
| /external/swiftshader/third_party/LLVM/lib/Analysis/ |
| ScalarEvolutionNormalization.cpp | 187 const SCEV *RN = TransformSubExpr(RO, User, OperandValToReplace);
188 if (LO != LN || RO != RN)
189 return SE.getUDivExpr(LN, RN);
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 45 std::string RN(RegName);
47 RN[0] = 'f';
48 OS << RN;
|
| /external/clang/lib/AST/ |
| DeclarationName.cpp | 99 unsigned LN = LHSSelector.getNumArgs(), RN = RHSSelector.getNumArgs();
100 for (unsigned I = 0, N = std::min(LN, RN); I != N; ++I) {
109 return compareInt(LN, RN);
|
| /external/eigen/Eigen/src/SparseLU/ |
| SparseLU_gemm_kernel.h | 35 RN = 2, // register blocking
41 Index n_end = (n/RN)*RN; // number of columns of B-C suitable for processing RN columns at once
65 for(Index j=0; j<n_end; j+=RN)
73 // load and expand a RN x RK block of B
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 57 std::string RN(RegName);
59 RN[0] = 'f';
60 OS << RN;
|
| /cts/tests/tests/renderscript/src/android/renderscript/cts/ |
| DebugContext.java | 107 Random RN;
118 RN = new Random(seed);
121 Width = RN.nextInt(size/2)+size/2;
122 Height = RN.nextInt(size/2);
142 RN.nextBytes(inArray);
151 inArray[i] = (short)RN.nextInt();
186 int Offset = AC.RN.nextInt(AC.Width);
187 int Count = AC.RN.nextInt(AC.Width - Offset);
230 int xOff = AC.RN.nextInt(AC.Width-AC.Height) + AC.Height;
231 int yOff = AC.RN.nextInt(AC.Height)
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTX.h | 129 RN,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| AVRISelDAGToDAG.cpp | 336 const RegisterSDNode *RN = dyn_cast<RegisterSDNode>(BasePtr.getOperand(0));
338 if (!RN || (RN->getReg() != AVR::SP)) {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| NVPTX.h | 127 RN,
|
| /external/llvm/include/llvm/Support/ |
| GenericDomTree.h | 398 const DomTreeNodeBase<NodeT> *RN = getNode(R);
399 if (!RN)
402 WL.push_back(RN);
|
| /external/lua/src/ |
| liolib.c | 395 } RN;
401 static int nextc (RN *rn) {
402 if (rn->n >= L_MAXLENNUM) { /* buffer overflow? */
403 rn->buff[0] = '\0'; /* invalidate result */
407 rn->buff[rn->n++] = rn->c; /* save current char */
408 rn->c = l_getc(rn->f); /* read next one *
441 RN rn; local
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/ |
| GenericDomTree.h | 379 const DomTreeNodeBase<NodeT> *RN = getNode(R);
380 if (!RN)
383 WL.push_back(RN);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| StructurizeCFG.cpp | 207 Loop *getAdjustedLoop(RegionNode *RN);
208 unsigned getAdjustedLoopDepth(RegionNode *RN);
307 /// Use the exit block to determine the loop if RN is a SubRegion.
308 Loop *StructurizeCFG::getAdjustedLoop(RegionNode *RN) {
309 if (RN->isSubRegion()) {
310 Region *SubRegion = RN->getNodeAs<Region>();
314 return LI->getLoopFor(RN->getEntry());
317 /// Use the exit block to determine the loop depth if RN is a SubRegion.
318 unsigned StructurizeCFG::getAdjustedLoopDepth(RegionNode *RN) {
319 if (RN->isSubRegion())
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelDAGToDAG.cpp | 865 RegisterSDNode *RN;
869 && ((RN = dyn_cast<RegisterSDNode>(Op0.getNode())) != 0
870 && RN->getReg() != SPU::R1))) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCommonGEP.cpp | [all...] |
| /external/pcre/dist2/src/sljit/ |
| sljitNativeARM_32.c | 73 #define RN(rn) (reg_map[rn] << 16)
294 /* Data transfer instruction with Rn == r15. */
892 (data_transfer_insts[(type) & 0xf] | ((add) << 23) | RD(target_reg) | RN(base_reg) | (arg))
[all...] |
| sljitNativeARM_64.c | 57 #define RN(rn) (reg_map[rn] << 5)
479 return push_inst(compiler, (ORRI ^ W_OP) | RD(dst) | RN(TMP_ZERO) | bitmask);
487 return push_inst(compiler, ORRI | RD(dst) | RN(TMP_ZERO) | bitmask);
608 return push_inst(compiler, ((op == SLJIT_ADD ? ADDI : SUBI) ^ inv_bits) | RD(dst) | RN(reg));
612 return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | (imm << 10));
617 return push_inst(compiler, (SUBI ^ inv_bits) | RD(dst) | RN(reg) | (nimm << 10));
621 return push_inst(compiler, (ADDI ^ inv_bits) | RD(dst) | RN(reg) | ((imm >> 12) << 10) | (1 << 22));
625 return push_inst(compiler, (SUBI ^ inv_bits) | RD(dst) | RN(reg) | ((nimm >> 12) << 10) | (1 << 22))
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonCommonGEP.cpp | [all...] |
| /external/v8/src/ppc/ |
| constants-ppc.h | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/v8/src/arm/ |
| constants-arm.h | 392 RN = 0 << 22, // Round to Nearest.
398 kRoundToNearest = RN,
|
| /external/v8/src/s390/ |
| constants-s390.h | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
