1 /* 2 * Copyright 2003 VMware, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef _INTEL_INIT_H_ 27 #define _INTEL_INIT_H_ 28 29 #include <stdbool.h> 30 #include <sys/time.h> 31 32 #include <GL/internal/dri_interface.h> 33 34 #include "isl/isl.h" 35 #include "dri_util.h" 36 #include "brw_bufmgr.h" 37 #include "common/gen_device_info.h" 38 #include "i915_drm.h" 39 #include "util/xmlconfig.h" 40 41 #include "isl/isl.h" 42 43 #ifdef __cplusplus 44 extern "C" { 45 #endif 46 47 struct intel_screen 48 { 49 int deviceID; 50 struct gen_device_info devinfo; 51 52 __DRIscreen *driScrnPriv; 53 54 uint64_t max_gtt_map_object_size; 55 56 /** Bytes of aperture usage beyond which execbuf is likely to fail. */ 57 uint64_t aperture_threshold; 58 59 bool no_hw; 60 bool hw_has_swizzling; 61 bool has_exec_fence; /**< I915_PARAM_HAS_EXEC_FENCE */ 62 63 int hw_has_timestamp; 64 65 struct isl_device isl_dev; 66 67 /** 68 * Does the kernel support context reset notifications? 69 */ 70 bool has_context_reset_notification; 71 72 /** 73 * Does the kernel support features such as pipelined register access to 74 * specific registers? 75 */ 76 unsigned kernel_features; 77 #define KERNEL_ALLOWS_SOL_OFFSET_WRITES (1<<0) 78 #define KERNEL_ALLOWS_PREDICATE_WRITES (1<<1) 79 #define KERNEL_ALLOWS_MI_MATH_AND_LRR (1<<2) 80 #define KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3 (1<<3) 81 #define KERNEL_ALLOWS_COMPUTE_DISPATCH (1<<4) 82 #define KERNEL_ALLOWS_EXEC_CAPTURE (1<<5) 83 #define KERNEL_ALLOWS_EXEC_BATCH_FIRST (1<<6) 84 85 struct brw_bufmgr *bufmgr; 86 87 /** 88 * A unique ID for shader programs. 89 */ 90 unsigned program_id; 91 92 int winsys_msaa_samples_override; 93 94 struct brw_compiler *compiler; 95 96 /** 97 * Configuration cache with default values for all contexts 98 */ 99 driOptionCache optionCache; 100 101 /** 102 * Version of the command parser reported by the 103 * I915_PARAM_CMD_PARSER_VERSION parameter 104 */ 105 int cmd_parser_version; 106 107 /** 108 * Number of subslices reported by the I915_PARAM_SUBSLICE_TOTAL parameter 109 */ 110 int subslice_total; 111 112 /** 113 * Number of EUs reported by the I915_PARAM_EU_TOTAL parameter 114 */ 115 int eu_total; 116 117 bool mesa_format_supports_texture[MESA_FORMAT_COUNT]; 118 bool mesa_format_supports_render[MESA_FORMAT_COUNT]; 119 enum isl_format mesa_to_isl_render_format[MESA_FORMAT_COUNT]; 120 }; 121 122 extern void intelDestroyContext(__DRIcontext * driContextPriv); 123 124 extern GLboolean intelUnbindContext(__DRIcontext * driContextPriv); 125 126 PUBLIC const __DRIextension **__driDriverGetExtensions_i965(void); 127 extern const __DRI2fenceExtension intelFenceExtension; 128 129 extern GLboolean 130 intelMakeCurrent(__DRIcontext * driContextPriv, 131 __DRIdrawable * driDrawPriv, 132 __DRIdrawable * driReadPriv); 133 134 double get_time(void); 135 136 const int* 137 intel_supported_msaa_modes(const struct intel_screen *screen); 138 139 int 140 intel_device_get_revision(int fd); 141 142 static inline bool 143 can_do_pipelined_register_writes(const struct intel_screen *screen) 144 { 145 return screen->kernel_features & KERNEL_ALLOWS_SOL_OFFSET_WRITES; 146 } 147 148 static inline bool 149 can_do_hsw_l3_atomics(const struct intel_screen *screen) 150 { 151 return screen->kernel_features & KERNEL_ALLOWS_HSW_SCRATCH1_AND_ROW_CHICKEN3; 152 } 153 154 static inline bool 155 can_do_mi_math_and_lrr(const struct intel_screen *screen) 156 { 157 return screen->kernel_features & KERNEL_ALLOWS_MI_MATH_AND_LRR; 158 } 159 160 static inline bool 161 can_do_compute_dispatch(const struct intel_screen *screen) 162 { 163 return screen->kernel_features & KERNEL_ALLOWS_COMPUTE_DISPATCH; 164 } 165 166 static inline bool 167 can_do_predicate_writes(const struct intel_screen *screen) 168 { 169 return screen->kernel_features & KERNEL_ALLOWS_PREDICATE_WRITES; 170 } 171 172 static inline bool 173 can_do_exec_capture(const struct intel_screen *screen) 174 { 175 return screen->kernel_features & KERNEL_ALLOWS_EXEC_CAPTURE; 176 } 177 178 #ifdef __cplusplus 179 } 180 #endif 181 182 #endif 183
