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      1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 /// \file
     11 /// The AMDGPU TargetMachine interface definition for hw codgen targets.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
     16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
     17 
     18 #include "AMDGPUIntrinsicInfo.h"
     19 #include "AMDGPUSubtarget.h"
     20 #include "llvm/ADT/Optional.h"
     21 #include "llvm/ADT/StringMap.h"
     22 #include "llvm/ADT/StringRef.h"
     23 #include "llvm/Analysis/TargetTransformInfo.h"
     24 #include "llvm/Support/CodeGen.h"
     25 #include "llvm/Target/TargetMachine.h"
     26 #include <memory>
     27 
     28 namespace llvm {
     29 
     30 //===----------------------------------------------------------------------===//
     31 // AMDGPU Target Machine (R600+)
     32 //===----------------------------------------------------------------------===//
     33 
     34 class AMDGPUTargetMachine : public LLVMTargetMachine {
     35 protected:
     36   std::unique_ptr<TargetLoweringObjectFile> TLOF;
     37   AMDGPUAS AS;
     38 
     39   StringRef getGPUName(const Function &F) const;
     40   StringRef getFeatureString(const Function &F) const;
     41 
     42 public:
     43   static bool EnableLateStructurizeCFG;
     44   static bool EnableFunctionCalls;
     45 
     46   AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
     47                       StringRef FS, TargetOptions Options,
     48                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
     49                       CodeGenOpt::Level OL);
     50   ~AMDGPUTargetMachine() override;
     51 
     52   const TargetSubtargetInfo *getSubtargetImpl() const;
     53   const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override = 0;
     54 
     55   TargetLoweringObjectFile *getObjFileLowering() const override {
     56     return TLOF.get();
     57   }
     58   AMDGPUAS getAMDGPUAS() const {
     59     return AS;
     60   }
     61 
     62   void adjustPassManager(PassManagerBuilder &) override;
     63   /// Get the integer value of a null pointer in the given address space.
     64   uint64_t getNullPointerValue(unsigned AddrSpace) const {
     65     if (AddrSpace == AS.LOCAL_ADDRESS || AddrSpace == AS.REGION_ADDRESS)
     66       return -1;
     67     return 0;
     68   }
     69 };
     70 
     71 //===----------------------------------------------------------------------===//
     72 // R600 Target Machine (R600 -> Cayman)
     73 //===----------------------------------------------------------------------===//
     74 
     75 class R600TargetMachine final : public AMDGPUTargetMachine {
     76 private:
     77   mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
     78 
     79 public:
     80   R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
     81                     StringRef FS, TargetOptions Options,
     82                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
     83                     CodeGenOpt::Level OL, bool JIT);
     84 
     85   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
     86 
     87   const R600Subtarget *getSubtargetImpl(const Function &) const override;
     88 
     89   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
     90 
     91   bool isMachineVerifierClean() const override {
     92     return false;
     93   }
     94 };
     95 
     96 //===----------------------------------------------------------------------===//
     97 // GCN Target Machine (SI+)
     98 //===----------------------------------------------------------------------===//
     99 
    100 class GCNTargetMachine final : public AMDGPUTargetMachine {
    101 private:
    102   AMDGPUIntrinsicInfo IntrinsicInfo;
    103   mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
    104 
    105 public:
    106   GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
    107                    StringRef FS, TargetOptions Options,
    108                    Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
    109                    CodeGenOpt::Level OL, bool JIT);
    110 
    111   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
    112 
    113   const GCNSubtarget *getSubtargetImpl(const Function &) const override;
    114 
    115   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
    116 
    117   const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
    118     return &IntrinsicInfo;
    119   }
    120 
    121   bool useIPRA() const override {
    122     return true;
    123   }
    124 };
    125 
    126 } // end namespace llvm
    127 
    128 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
    129