1 /* 2 * Copyright 2011 Joakim Sindholt <opensource (at) zhasha.com> 3 * Copyright 2013 Christoph Bumiller 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24 #include "device9.h" 25 #include "nine_pipe.h" 26 27 #include "cso_cache/cso_context.h" 28 29 void 30 nine_convert_dsa_state(struct pipe_depth_stencil_alpha_state *dsa_state, 31 const DWORD *rs) 32 { 33 struct pipe_depth_stencil_alpha_state dsa; 34 35 memset(&dsa, 0, sizeof(dsa)); /* memcmp safety */ 36 37 if (rs[D3DRS_ZENABLE]) { 38 dsa.depth.enabled = 1; 39 dsa.depth.writemask = !!rs[D3DRS_ZWRITEENABLE]; 40 dsa.depth.func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ZFUNC]); 41 } 42 43 if (rs[D3DRS_STENCILENABLE]) { 44 dsa.stencil[0].enabled = 1; 45 dsa.stencil[0].func = d3dcmpfunc_to_pipe_func(rs[D3DRS_STENCILFUNC]); 46 dsa.stencil[0].fail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILFAIL]); 47 dsa.stencil[0].zpass_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILPASS]); 48 dsa.stencil[0].zfail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_STENCILZFAIL]); 49 dsa.stencil[0].valuemask = rs[D3DRS_STENCILMASK]; 50 dsa.stencil[0].writemask = rs[D3DRS_STENCILWRITEMASK]; 51 52 if (rs[D3DRS_TWOSIDEDSTENCILMODE]) { 53 dsa.stencil[1].enabled = 1; 54 dsa.stencil[1].func = d3dcmpfunc_to_pipe_func(rs[D3DRS_CCW_STENCILFUNC]); 55 dsa.stencil[1].fail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILFAIL]); 56 dsa.stencil[1].zpass_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILPASS]); 57 dsa.stencil[1].zfail_op = d3dstencilop_to_pipe_stencil_op(rs[D3DRS_CCW_STENCILZFAIL]); 58 dsa.stencil[1].valuemask = dsa.stencil[0].valuemask; 59 dsa.stencil[1].writemask = dsa.stencil[0].writemask; 60 } 61 } 62 63 if (rs[D3DRS_ALPHATESTENABLE]) { 64 dsa.alpha.enabled = 1; 65 dsa.alpha.func = d3dcmpfunc_to_pipe_func(rs[D3DRS_ALPHAFUNC]); 66 dsa.alpha.ref_value = (float)rs[D3DRS_ALPHAREF] / 255.0f; 67 } 68 69 *dsa_state = dsa; 70 } 71 72 void 73 nine_convert_rasterizer_state(struct NineDevice9 *device, 74 struct pipe_rasterizer_state *rast_state, 75 const DWORD *rs) 76 { 77 struct pipe_rasterizer_state rast; 78 79 memset(&rast, 0, sizeof(rast)); 80 81 rast.flatshade = rs[D3DRS_SHADEMODE] == D3DSHADE_FLAT; 82 /* rast.light_twoside = 0; */ 83 /* rast.clamp_fragment_color = 0; */ 84 /* rast.clamp_vertex_color = 0; */ 85 /* rast.front_ccw = 0; */ 86 rast.cull_face = d3dcull_to_pipe_face(rs[D3DRS_CULLMODE]); 87 rast.fill_front = d3dfillmode_to_pipe_polygon_mode(rs[D3DRS_FILLMODE]); 88 rast.fill_back = rast.fill_front; 89 rast.offset_tri = !!(rs[D3DRS_DEPTHBIAS] | rs[D3DRS_SLOPESCALEDEPTHBIAS]); 90 rast.offset_line = rast.offset_tri; /* triangles in wireframe mode */ 91 rast.offset_point = 0; /* XXX ? */ 92 rast.scissor = !!rs[D3DRS_SCISSORTESTENABLE]; 93 /* rast.poly_smooth = 0; */ 94 /* rast.poly_stipple_enable = 0; */ 95 /* rast.point_smooth = 0; */ 96 rast.sprite_coord_mode = PIPE_SPRITE_COORD_UPPER_LEFT; 97 rast.point_quad_rasterization = 1; 98 rast.point_size_per_vertex = rs[NINED3DRS_VSPOINTSIZE]; 99 rast.multisample = rs[NINED3DRS_MULTISAMPLE]; 100 rast.line_smooth = !!rs[D3DRS_ANTIALIASEDLINEENABLE]; 101 /* rast.line_stipple_enable = 0; */ 102 rast.line_last_pixel = !!rs[D3DRS_LASTPIXEL]; 103 rast.flatshade_first = 1; 104 /* rast.half_pixel_center = 0; */ 105 /* rast.lower_left_origin = 0; */ 106 /* rast.bottom_edge_rule = 0; */ 107 /* rast.rasterizer_discard = 0; */ 108 rast.depth_clip = 1; 109 rast.clip_halfz = 1; 110 rast.clip_plane_enable = rs[D3DRS_CLIPPLANEENABLE]; 111 /* rast.line_stipple_factor = 0; */ 112 /* rast.line_stipple_pattern = 0; */ 113 rast.sprite_coord_enable = rs[D3DRS_POINTSPRITEENABLE] ? 0xff : 0x00; 114 rast.line_width = 1.0f; 115 if (rs[NINED3DRS_VSPOINTSIZE]) { 116 rast.point_size = 1.0f; 117 } else { 118 rast.point_size = CLAMP(asfloat(rs[D3DRS_POINTSIZE]), 119 asfloat(rs[D3DRS_POINTSIZE_MIN]), 120 asfloat(rs[D3DRS_POINTSIZE_MAX])); 121 } 122 /* offset_units has the ogl/d3d11 meaning. 123 * d3d9: offset = scale * dz + bias 124 * ogl/d3d11: offset = scale * dz + r * bias 125 * with r implementation dependent (+ different formula for float depth 126 * buffers). r=2^-23 is often the right value for gallium drivers. 127 * If possible, use offset_units_unscaled, which gives the d3d9 128 * behaviour, else scale by 1 << 23 */ 129 rast.offset_units = asfloat(rs[D3DRS_DEPTHBIAS]) * (device->driver_caps.offset_units_unscaled ? 1.0f : (float)(1 << 23)); 130 rast.offset_units_unscaled = device->driver_caps.offset_units_unscaled; 131 rast.offset_scale = asfloat(rs[D3DRS_SLOPESCALEDEPTHBIAS]); 132 /* rast.offset_clamp = 0.0f; */ 133 134 *rast_state = rast; 135 } 136 137 static inline void 138 nine_convert_blend_state_fixup(struct pipe_blend_state *blend, const DWORD *rs) 139 { 140 if (unlikely(rs[D3DRS_SRCBLEND] == D3DBLEND_BOTHSRCALPHA || 141 rs[D3DRS_SRCBLEND] == D3DBLEND_BOTHINVSRCALPHA)) { 142 blend->rt[0].rgb_dst_factor = (rs[D3DRS_SRCBLEND] == D3DBLEND_BOTHSRCALPHA) ? 143 PIPE_BLENDFACTOR_INV_SRC_ALPHA : PIPE_BLENDFACTOR_SRC_ALPHA; 144 if (!rs[D3DRS_SEPARATEALPHABLENDENABLE]) 145 blend->rt[0].alpha_dst_factor = blend->rt[0].rgb_dst_factor; 146 } else 147 if (unlikely(rs[D3DRS_SEPARATEALPHABLENDENABLE] && 148 (rs[D3DRS_SRCBLENDALPHA] == D3DBLEND_BOTHSRCALPHA || 149 rs[D3DRS_SRCBLENDALPHA] == D3DBLEND_BOTHINVSRCALPHA))) { 150 blend->rt[0].alpha_dst_factor = (rs[D3DRS_SRCBLENDALPHA] == D3DBLEND_BOTHSRCALPHA) ? 151 PIPE_BLENDFACTOR_INV_SRC_ALPHA : PIPE_BLENDFACTOR_SRC_ALPHA; 152 } 153 } 154 155 void 156 nine_convert_blend_state(struct pipe_blend_state *blend_state, const DWORD *rs) 157 { 158 struct pipe_blend_state blend; 159 160 memset(&blend, 0, sizeof(blend)); /* memcmp safety */ 161 162 blend.dither = !!rs[D3DRS_DITHERENABLE]; 163 164 /* blend.alpha_to_one = 0; */ 165 blend.alpha_to_coverage = rs[NINED3DRS_ALPHACOVERAGE] & 1; 166 167 blend.rt[0].blend_enable = !!rs[D3DRS_ALPHABLENDENABLE]; 168 if (blend.rt[0].blend_enable) { 169 blend.rt[0].rgb_func = d3dblendop_to_pipe_blend(rs[D3DRS_BLENDOP]); 170 blend.rt[0].rgb_src_factor = d3dblend_color_to_pipe_blendfactor(rs[D3DRS_SRCBLEND]); 171 blend.rt[0].rgb_dst_factor = d3dblend_color_to_pipe_blendfactor(rs[D3DRS_DESTBLEND]); 172 if (rs[D3DRS_SEPARATEALPHABLENDENABLE]) { 173 blend.rt[0].alpha_func = d3dblendop_to_pipe_blend(rs[D3DRS_BLENDOPALPHA]); 174 blend.rt[0].alpha_src_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_SRCBLENDALPHA]); 175 blend.rt[0].alpha_dst_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_DESTBLENDALPHA]); 176 } else { 177 /* TODO: Just copy the rgb values ? SRC1_x may differ ... */ 178 blend.rt[0].alpha_func = blend.rt[0].rgb_func; 179 blend.rt[0].alpha_src_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_SRCBLEND]); 180 blend.rt[0].alpha_dst_factor = d3dblend_alpha_to_pipe_blendfactor(rs[D3DRS_DESTBLEND]); 181 } 182 nine_convert_blend_state_fixup(&blend, rs); /* for BOTH[INV]SRCALPHA */ 183 } 184 185 blend.rt[0].colormask = rs[D3DRS_COLORWRITEENABLE]; 186 187 if (rs[D3DRS_COLORWRITEENABLE1] != rs[D3DRS_COLORWRITEENABLE] || 188 rs[D3DRS_COLORWRITEENABLE2] != rs[D3DRS_COLORWRITEENABLE] || 189 rs[D3DRS_COLORWRITEENABLE3] != rs[D3DRS_COLORWRITEENABLE]) { 190 unsigned i; 191 blend.independent_blend_enable = TRUE; 192 for (i = 1; i < 4; ++i) 193 blend.rt[i] = blend.rt[0]; 194 blend.rt[1].colormask = rs[D3DRS_COLORWRITEENABLE1]; 195 blend.rt[2].colormask = rs[D3DRS_COLORWRITEENABLE2]; 196 blend.rt[3].colormask = rs[D3DRS_COLORWRITEENABLE3]; 197 } 198 199 /* blend.force_srgb = !!rs[D3DRS_SRGBWRITEENABLE]; */ 200 201 *blend_state = blend; 202 } 203 204 void 205 nine_convert_sampler_state(struct cso_context *ctx, int idx, const DWORD *ss) 206 { 207 struct pipe_sampler_state samp; 208 209 assert(idx >= 0 && 210 (idx < NINE_MAX_SAMPLERS_PS || idx >= NINE_SAMPLER_VS(0)) && 211 (idx < NINE_MAX_SAMPLERS)); 212 213 memset(&samp, 0, sizeof(samp)); /* memcmp safety */ 214 215 if (ss[D3DSAMP_MIPFILTER] != D3DTEXF_NONE) { 216 samp.lod_bias = asfloat(ss[D3DSAMP_MIPMAPLODBIAS]); 217 samp.min_lod = ss[NINED3DSAMP_MINLOD]; 218 samp.min_mip_filter = (ss[D3DSAMP_MIPFILTER] == D3DTEXF_POINT) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR; 219 } else { 220 samp.min_mip_filter = PIPE_TEX_MIPFILTER_NONE; 221 } 222 samp.max_lod = 15.0f; 223 224 if (ss[NINED3DSAMP_CUBETEX]) { 225 /* Cube textures are always clamped to edge on D3D */ 226 samp.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 227 samp.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 228 samp.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 229 } else { 230 samp.wrap_s = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSU]); 231 samp.wrap_t = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSV]); 232 samp.wrap_r = d3dtextureaddress_to_pipe_tex_wrap(ss[D3DSAMP_ADDRESSW]); 233 } 234 samp.min_img_filter = (ss[D3DSAMP_MINFILTER] == D3DTEXF_POINT && !ss[NINED3DSAMP_SHADOW]) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR; 235 samp.mag_img_filter = (ss[D3DSAMP_MAGFILTER] == D3DTEXF_POINT && !ss[NINED3DSAMP_SHADOW]) ? PIPE_TEX_FILTER_NEAREST : PIPE_TEX_FILTER_LINEAR; 236 if (ss[D3DSAMP_MINFILTER] == D3DTEXF_ANISOTROPIC || 237 ss[D3DSAMP_MAGFILTER] == D3DTEXF_ANISOTROPIC) 238 samp.max_anisotropy = ss[D3DSAMP_MAXANISOTROPY]; 239 samp.compare_mode = ss[NINED3DSAMP_SHADOW] ? PIPE_TEX_COMPARE_R_TO_TEXTURE : PIPE_TEX_COMPARE_NONE; 240 samp.compare_func = PIPE_FUNC_LEQUAL; 241 samp.normalized_coords = 1; 242 samp.seamless_cube_map = 0; 243 d3dcolor_to_pipe_color_union(&samp.border_color, ss[D3DSAMP_BORDERCOLOR]); 244 245 /* see nine_state.h */ 246 if (idx < NINE_MAX_SAMPLERS_PS) 247 cso_single_sampler(ctx, PIPE_SHADER_FRAGMENT, idx - NINE_SAMPLER_PS(0), &samp); 248 else 249 cso_single_sampler(ctx, PIPE_SHADER_VERTEX, idx - NINE_SAMPLER_VS(0), &samp); 250 } 251 252 const enum pipe_format nine_d3d9_to_pipe_format_map[120] = 253 { 254 [D3DFMT_UNKNOWN] = PIPE_FORMAT_NONE, 255 [D3DFMT_R8G8B8] = PIPE_FORMAT_R8G8B8_UNORM, 256 [D3DFMT_A8R8G8B8] = PIPE_FORMAT_B8G8R8A8_UNORM, 257 [D3DFMT_X8R8G8B8] = PIPE_FORMAT_B8G8R8X8_UNORM, 258 [D3DFMT_R5G6B5] = PIPE_FORMAT_B5G6R5_UNORM, 259 [D3DFMT_X1R5G5B5] = PIPE_FORMAT_B5G5R5X1_UNORM, 260 [D3DFMT_A1R5G5B5] = PIPE_FORMAT_B5G5R5A1_UNORM, 261 [D3DFMT_A4R4G4B4] = PIPE_FORMAT_B4G4R4A4_UNORM, 262 [D3DFMT_R3G3B2] = PIPE_FORMAT_B2G3R3_UNORM, 263 [D3DFMT_A8] = PIPE_FORMAT_A8_UNORM, 264 [D3DFMT_A8R3G3B2] = PIPE_FORMAT_NONE, 265 [D3DFMT_X4R4G4B4] = PIPE_FORMAT_B4G4R4X4_UNORM, 266 [D3DFMT_A2B10G10R10] = PIPE_FORMAT_R10G10B10A2_UNORM, 267 [D3DFMT_A8B8G8R8] = PIPE_FORMAT_R8G8B8A8_UNORM, 268 [D3DFMT_X8B8G8R8] = PIPE_FORMAT_R8G8B8X8_UNORM, 269 [D3DFMT_G16R16] = PIPE_FORMAT_R16G16_UNORM, 270 [D3DFMT_A2R10G10B10] = PIPE_FORMAT_B10G10R10A2_UNORM, 271 [D3DFMT_A16B16G16R16] = PIPE_FORMAT_R16G16B16A16_UNORM, 272 [D3DFMT_A8P8] = PIPE_FORMAT_NONE, 273 [D3DFMT_P8] = PIPE_FORMAT_NONE, 274 [D3DFMT_L8] = PIPE_FORMAT_L8_UNORM, 275 [D3DFMT_A8L8] = PIPE_FORMAT_L8A8_UNORM, 276 [D3DFMT_A4L4] = PIPE_FORMAT_L4A4_UNORM, 277 [D3DFMT_V8U8] = PIPE_FORMAT_R8G8_SNORM, 278 [D3DFMT_L6V5U5] = PIPE_FORMAT_NONE, /* Should be PIPE_FORMAT_R5SG5SB6U_NORM, but interpretation of the data differs a bit. */ 279 [D3DFMT_X8L8V8U8] = PIPE_FORMAT_R8SG8SB8UX8U_NORM, 280 [D3DFMT_Q8W8V8U8] = PIPE_FORMAT_R8G8B8A8_SNORM, 281 [D3DFMT_V16U16] = PIPE_FORMAT_R16G16_SNORM, 282 [D3DFMT_A2W10V10U10] = PIPE_FORMAT_R10SG10SB10SA2U_NORM, 283 [D3DFMT_D16_LOCKABLE] = PIPE_FORMAT_Z16_UNORM, 284 [D3DFMT_D32] = PIPE_FORMAT_Z32_UNORM, 285 [D3DFMT_D15S1] = PIPE_FORMAT_Z24_UNORM_S8_UINT, 286 [D3DFMT_D24S8] = PIPE_FORMAT_S8_UINT_Z24_UNORM, 287 [D3DFMT_D24X8] = PIPE_FORMAT_X8Z24_UNORM, 288 [D3DFMT_D24X4S4] = PIPE_FORMAT_Z24_UNORM_S8_UINT, 289 [D3DFMT_D16] = PIPE_FORMAT_Z16_UNORM, 290 [D3DFMT_D32F_LOCKABLE] = PIPE_FORMAT_Z32_FLOAT, 291 [D3DFMT_D24FS8] = PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, 292 [D3DFMT_D32_LOCKABLE] = PIPE_FORMAT_NONE, 293 [D3DFMT_S8_LOCKABLE] = PIPE_FORMAT_NONE, 294 [D3DFMT_L16] = PIPE_FORMAT_L16_UNORM, 295 [D3DFMT_VERTEXDATA] = PIPE_FORMAT_NONE, 296 [D3DFMT_INDEX16] = PIPE_FORMAT_R16_UINT, 297 [D3DFMT_INDEX32] = PIPE_FORMAT_R32_UINT, 298 [D3DFMT_Q16W16V16U16] = PIPE_FORMAT_R16G16B16A16_SNORM, 299 [D3DFMT_R16F] = PIPE_FORMAT_R16_FLOAT, 300 [D3DFMT_G16R16F] = PIPE_FORMAT_R16G16_FLOAT, 301 [D3DFMT_A16B16G16R16F] = PIPE_FORMAT_R16G16B16A16_FLOAT, 302 [D3DFMT_R32F] = PIPE_FORMAT_R32_FLOAT, 303 [D3DFMT_G32R32F] = PIPE_FORMAT_R32G32_FLOAT, 304 [D3DFMT_A32B32G32R32F] = PIPE_FORMAT_R32G32B32A32_FLOAT, 305 [D3DFMT_CxV8U8] = PIPE_FORMAT_NONE, 306 [D3DFMT_A1] = PIPE_FORMAT_NONE, 307 [D3DFMT_A2B10G10R10_XR_BIAS] = PIPE_FORMAT_NONE, 308 }; 309 310 const D3DFORMAT nine_pipe_to_d3d9_format_map[PIPE_FORMAT_COUNT] = 311 { 312 [PIPE_FORMAT_NONE] = D3DFMT_UNKNOWN, 313 /* TODO: rename PIPE_FORMAT_R8G8B8_UNORM to PIPE_FORMAT_B8G8R8_UNORM */ 314 [PIPE_FORMAT_R8G8B8_UNORM] = D3DFMT_R8G8B8, 315 [PIPE_FORMAT_B8G8R8A8_UNORM] = D3DFMT_A8R8G8B8, 316 [PIPE_FORMAT_B8G8R8X8_UNORM] = D3DFMT_X8R8G8B8, 317 [PIPE_FORMAT_B5G6R5_UNORM] = D3DFMT_R5G6B5, 318 [PIPE_FORMAT_B5G5R5X1_UNORM] = D3DFMT_X1R5G5B5, 319 [PIPE_FORMAT_B5G5R5A1_UNORM] = D3DFMT_A1R5G5B5, 320 [PIPE_FORMAT_B4G4R4A4_UNORM] = D3DFMT_A4R4G4B4, 321 [PIPE_FORMAT_B2G3R3_UNORM] = D3DFMT_R3G3B2, 322 [PIPE_FORMAT_A8_UNORM] = D3DFMT_A8, 323 /* [PIPE_FORMAT_B2G3R3A8_UNORM] = D3DFMT_A8R3G3B2, */ 324 [PIPE_FORMAT_B4G4R4X4_UNORM] = D3DFMT_X4R4G4B4, 325 [PIPE_FORMAT_R10G10B10A2_UNORM] = D3DFMT_A2B10G10R10, 326 [PIPE_FORMAT_R8G8B8A8_UNORM] = D3DFMT_A8B8G8R8, 327 [PIPE_FORMAT_R8G8B8X8_UNORM] = D3DFMT_X8B8G8R8, 328 [PIPE_FORMAT_R16G16_UNORM] = D3DFMT_G16R16, 329 [PIPE_FORMAT_B10G10R10A2_UNORM] = D3DFMT_A2R10G10B10, 330 [PIPE_FORMAT_R16G16B16A16_UNORM] = D3DFMT_A16B16G16R16, 331 332 [PIPE_FORMAT_R8_UINT] = D3DFMT_P8, 333 [PIPE_FORMAT_R8A8_UINT] = D3DFMT_A8P8, 334 335 [PIPE_FORMAT_L8_UNORM] = D3DFMT_L8, 336 [PIPE_FORMAT_L8A8_UNORM] = D3DFMT_A8L8, 337 [PIPE_FORMAT_L4A4_UNORM] = D3DFMT_A4L4, 338 339 [PIPE_FORMAT_R8G8_SNORM] = D3DFMT_V8U8, 340 /* [PIPE_FORMAT_?] = D3DFMT_L6V5U5, */ 341 /* [PIPE_FORMAT_?] = D3DFMT_X8L8V8U8, */ 342 [PIPE_FORMAT_R8G8B8A8_SNORM] = D3DFMT_Q8W8V8U8, 343 [PIPE_FORMAT_R16G16_SNORM] = D3DFMT_V16U16, 344 [PIPE_FORMAT_R10SG10SB10SA2U_NORM] = D3DFMT_A2W10V10U10, 345 346 [PIPE_FORMAT_YUYV] = D3DFMT_UYVY, 347 /* [PIPE_FORMAT_YUY2] = D3DFMT_YUY2, */ 348 [PIPE_FORMAT_DXT1_RGBA] = D3DFMT_DXT1, 349 /* [PIPE_FORMAT_DXT2_RGBA] = D3DFMT_DXT2, */ 350 [PIPE_FORMAT_DXT3_RGBA] = D3DFMT_DXT3, 351 /* [PIPE_FORMAT_DXT4_RGBA] = D3DFMT_DXT4, */ 352 [PIPE_FORMAT_DXT5_RGBA] = D3DFMT_DXT5, 353 /* [PIPE_FORMAT_?] = D3DFMT_MULTI2_ARGB8, (MET) */ 354 [PIPE_FORMAT_R8G8_B8G8_UNORM] = D3DFMT_R8G8_B8G8, /* XXX: order */ 355 [PIPE_FORMAT_G8R8_G8B8_UNORM] = D3DFMT_G8R8_G8B8, 356 357 [PIPE_FORMAT_Z16_UNORM] = D3DFMT_D16_LOCKABLE, 358 [PIPE_FORMAT_Z32_UNORM] = D3DFMT_D32, 359 /* [PIPE_FORMAT_Z15_UNORM_S1_UINT] = D3DFMT_D15S1, */ 360 [PIPE_FORMAT_S8_UINT_Z24_UNORM] = D3DFMT_D24S8, 361 [PIPE_FORMAT_X8Z24_UNORM] = D3DFMT_D24X8, 362 [PIPE_FORMAT_L16_UNORM] = D3DFMT_L16, 363 [PIPE_FORMAT_Z32_FLOAT] = D3DFMT_D32F_LOCKABLE, 364 /* [PIPE_FORMAT_Z24_FLOAT_S8_UINT] = D3DFMT_D24FS8, */ 365 366 [PIPE_FORMAT_R16_UINT] = D3DFMT_INDEX16, 367 [PIPE_FORMAT_R32_UINT] = D3DFMT_INDEX32, 368 [PIPE_FORMAT_R16G16B16A16_SNORM] = D3DFMT_Q16W16V16U16, 369 370 [PIPE_FORMAT_R16_FLOAT] = D3DFMT_R16F, 371 [PIPE_FORMAT_R32_FLOAT] = D3DFMT_R32F, 372 [PIPE_FORMAT_R16G16_FLOAT] = D3DFMT_G16R16F, 373 [PIPE_FORMAT_R32G32_FLOAT] = D3DFMT_G32R32F, 374 [PIPE_FORMAT_R16G16B16A16_FLOAT] = D3DFMT_A16B16G16R16F, 375 [PIPE_FORMAT_R32G32B32A32_FLOAT] = D3DFMT_A32B32G32R32F, 376 377 /* [PIPE_FORMAT_?] = D3DFMT_CxV8U8, */ 378 }; 379
