/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/ |
tegra_bl31_setup.c | 242 uint32_t tmp_reg; local 264 tmp_reg = SCR_RES1_BITS | SCR_RW_BIT; 265 write_scr(tmp_reg);
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/external/u-boot/board/keymile/km83xx/ |
km83xx.c | 245 u8 tmp_reg; local 248 tmp_reg = in_8(&base->res1[0]) | 0x10; /* DIRECT3 register */ 249 out_8(&base->res1[0], tmp_reg); /* GP28 as output */ 250 tmp_reg = in_8(&base->gprt3) | 0x10; /* GP28 to high */ 251 out_8(&base->gprt3, tmp_reg);
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/art/compiler/utils/arm/ |
assembler_arm_vixl.cc | 248 vixl32::Register tmp_reg; local 256 tmp_reg = temps.Acquire(); 264 tmp_reg = (base.GetCode() != 5) ? r5 : r6; 265 ___ Push(tmp_reg); 272 offset = AdjustLoadStoreOffset(GetAllowedStoreOffsetBits(type), tmp_reg, base, offset); 273 base = tmp_reg; 293 if ((tmp_reg.IsValid()) && (tmp_reg.GetCode() != kIpCode)) { 294 CHECK(tmp_reg.Is(r5) || tmp_reg.Is(r6)) << tmp_reg [all...] |
/external/u-boot/arch/arm/mach-mvebu/serdes/axp/ |
high_speed_env_lib.c | 1206 u32 tmp_reg, tmp_pex_reg; local [all...] |
/external/u-boot/drivers/qe/ |
uec_phy.c | 131 u32 tmp_reg; local 151 tmp_reg = ((u32) mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | mii_reg; 152 out_be32 (&ug_regs->miimadd, tmp_reg); 170 u32 tmp_reg; local 189 tmp_reg = ((u32) mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | mii_reg; 190 out_be32 (&ug_regs->miimadd, tmp_reg);
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
si_shader_tgsi_setup.c | 386 struct tgsi_full_src_register tmp_reg = {}; local 387 tmp_reg.Register.File = File; 390 tmp_reg.Register.Index = i + range.First; 391 LLVMValueRef temp = si_llvm_emit_fetch(bld_base, &tmp_reg, type, swizzle); [all...] |
/art/compiler/optimizing/ |
intrinsics_mips.cc | 1652 Register tmp_reg = start_at_zero ? locations->GetTemp(0).AsRegister<Register>() : TMP; local [all...] |
intrinsics_mips64.cc | 1500 GpuRegister tmp_reg = start_at_zero ? locations->GetTemp(0).AsRegister<GpuRegister>() : TMP; local [all...] |
intrinsics_arm64.cc | 181 Register tmp_reg = WRegisterFrom(tmp_); variable 186 __ Ldr(tmp_reg, MemOperand(src_curr_addr, element_size, PostIndex)); 187 codegen->GetAssembler()->MaybeUnpoisonHeapReference(tmp_reg); variable 189 // tmp_reg = ReadBarrier::Mark(tmp_reg); 212 codegen->GetAssembler()->MaybePoisonHeapReference(tmp_reg); variable 213 __ Str(tmp_reg, MemOperand(dst_curr_addr, element_size, PostIndex)); 1622 Register tmp_reg = WRegisterFrom(locations->GetTemp(0)); local [all...] |
intrinsics_arm_vixl.cc | 1694 vixl32::Register tmp_reg = RegisterFrom(locations->GetTemp(0)); local [all...] |
/external/v8/src/arm/ |
macro-assembler-arm.cc | 1379 Register tmp_reg = scratch1; local [all...] |
/external/v8/src/ia32/ |
macro-assembler-ia32.cc | 997 Register tmp_reg = scratch1; local 1000 tmp_reg); local 1024 mov(Operand(new_sp_reg, count_reg, times_pointer_size, 0), tmp_reg); local [all...] |
/external/v8/src/ppc/ |
macro-assembler-ppc.cc | 1176 Register tmp_reg = scratch1; local [all...] |
/external/v8/src/wasm/baseline/ia32/ |
liftoff-assembler-ia32.h | 629 Register tmp_reg = no_reg; local 633 tmp_reg = assm->GetUnusedRegister(kGpReg, pinned).gp(); 634 assm->mov(tmp_reg, ecx); 635 if (src == ecx) src = tmp_reg; 645 if (tmp_reg.is_valid()) assm->mov(ecx, tmp_reg); [all...] |
/external/v8/src/x64/ |
macro-assembler-x64.cc | 2109 Register tmp_reg = scratch1; local 2111 movp(Operand(rsp, 0), tmp_reg); local 2133 movp(Operand(new_sp_reg, count_reg, times_pointer_size, 0), tmp_reg); local [all...] |
/external/v8/src/arm64/ |
macro-assembler-arm64.cc | 2093 Register tmp_reg = scratch1; local [all...] |
/external/v8/src/mips/ |
macro-assembler-mips.cc | 4191 Register tmp_reg = scratch1; local [all...] |
/external/v8/src/mips64/ |
macro-assembler-mips64.cc | 4572 Register tmp_reg = scratch1; local [all...] |
/external/v8/src/s390/ |
macro-assembler-s390.cc | 1241 Register tmp_reg = scratch1; local [all...] |
/external/pcre/dist2/src/ |
pcre2_jit_compile.c | 1853 int tmp_reg = status->tmp_regs[next_tmp_reg]; local 1877 int tmp_reg, saved_tmp_reg, i; local [all...] |