1 /* 2 * Copyright 2014-2017 Broadcom 3 * Copyright (C) 2012 Rob Clark <robclark (at) freedesktop.org> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 25 #ifndef VC5_CONTEXT_H 26 #define VC5_CONTEXT_H 27 28 #ifdef V3D_VERSION 29 #include "broadcom/common/v3d_macros.h" 30 #endif 31 32 #include <stdio.h> 33 34 #include "pipe/p_context.h" 35 #include "pipe/p_state.h" 36 #include "util/bitset.h" 37 #include "util/slab.h" 38 #include "xf86drm.h" 39 #include "vc5_drm.h" 40 #include "vc5_screen.h" 41 42 struct vc5_job; 43 struct vc5_bo; 44 void vc5_job_add_bo(struct vc5_job *job, struct vc5_bo *bo); 45 46 #define __user 47 #include "vc5_drm.h" 48 #include "vc5_bufmgr.h" 49 #include "vc5_resource.h" 50 #include "vc5_cl.h" 51 52 #ifdef USE_VC5_SIMULATOR 53 #define using_vc5_simulator true 54 #else 55 #define using_vc5_simulator false 56 #endif 57 58 #define VC5_DIRTY_BLEND (1 << 0) 59 #define VC5_DIRTY_RASTERIZER (1 << 1) 60 #define VC5_DIRTY_ZSA (1 << 2) 61 #define VC5_DIRTY_FRAGTEX (1 << 3) 62 #define VC5_DIRTY_VERTTEX (1 << 4) 63 64 #define VC5_DIRTY_BLEND_COLOR (1 << 7) 65 #define VC5_DIRTY_STENCIL_REF (1 << 8) 66 #define VC5_DIRTY_SAMPLE_MASK (1 << 9) 67 #define VC5_DIRTY_FRAMEBUFFER (1 << 10) 68 #define VC5_DIRTY_STIPPLE (1 << 11) 69 #define VC5_DIRTY_VIEWPORT (1 << 12) 70 #define VC5_DIRTY_CONSTBUF (1 << 13) 71 #define VC5_DIRTY_VTXSTATE (1 << 14) 72 #define VC5_DIRTY_VTXBUF (1 << 15) 73 #define VC5_DIRTY_SCISSOR (1 << 17) 74 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18) 75 #define VC5_DIRTY_PRIM_MODE (1 << 19) 76 #define VC5_DIRTY_CLIP (1 << 20) 77 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21) 78 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22) 79 #define VC5_DIRTY_COMPILED_CS (1 << 23) 80 #define VC5_DIRTY_COMPILED_VS (1 << 24) 81 #define VC5_DIRTY_COMPILED_FS (1 << 25) 82 #define VC5_DIRTY_FS_INPUTS (1 << 26) 83 #define VC5_DIRTY_STREAMOUT (1 << 27) 84 #define VC5_DIRTY_OQ (1 << 28) 85 86 #define VC5_MAX_FS_INPUTS 64 87 88 struct vc5_sampler_view { 89 struct pipe_sampler_view base; 90 uint32_t p0; 91 uint32_t p1; 92 /* Precomputed swizzles to pass in to the shader key. */ 93 uint8_t swizzle[4]; 94 95 uint8_t texture_shader_state[32]; 96 /* V3D 4.x: Texture state struct. */ 97 struct vc5_bo *bo; 98 }; 99 100 struct vc5_sampler_state { 101 struct pipe_sampler_state base; 102 uint32_t p0; 103 uint32_t p1; 104 105 /* V3D 3.x: Packed texture state. */ 106 uint8_t texture_shader_state[32]; 107 /* V3D 4.x: Sampler state struct. */ 108 struct vc5_bo *bo; 109 }; 110 111 struct vc5_texture_stateobj { 112 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS]; 113 unsigned num_textures; 114 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS]; 115 unsigned num_samplers; 116 struct vc5_cl_reloc texture_state[PIPE_MAX_SAMPLERS]; 117 }; 118 119 struct vc5_shader_uniform_info { 120 enum quniform_contents *contents; 121 uint32_t *data; 122 uint32_t count; 123 }; 124 125 struct vc5_uncompiled_shader { 126 /** A name for this program, so you can track it in shader-db output. */ 127 uint32_t program_id; 128 /** How many variants of this program were compiled, for shader-db. */ 129 uint32_t compiled_variant_count; 130 struct pipe_shader_state base; 131 uint32_t num_tf_outputs; 132 struct v3d_varying_slot *tf_outputs; 133 uint16_t tf_specs[PIPE_MAX_SO_BUFFERS]; 134 uint32_t num_tf_specs; 135 }; 136 137 struct vc5_compiled_shader { 138 struct vc5_bo *bo; 139 140 union { 141 struct v3d_prog_data *base; 142 struct v3d_vs_prog_data *vs; 143 struct v3d_fs_prog_data *fs; 144 } prog_data; 145 146 /** 147 * VC5_DIRTY_* flags that, when set in vc5->dirty, mean that the 148 * uniforms have to be rewritten (and therefore the shader state 149 * reemitted). 150 */ 151 uint32_t uniform_dirty_bits; 152 }; 153 154 struct vc5_program_stateobj { 155 struct vc5_uncompiled_shader *bind_vs, *bind_fs; 156 struct vc5_compiled_shader *cs, *vs, *fs; 157 }; 158 159 struct vc5_constbuf_stateobj { 160 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS]; 161 uint32_t enabled_mask; 162 uint32_t dirty_mask; 163 }; 164 165 struct vc5_vertexbuf_stateobj { 166 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS]; 167 unsigned count; 168 uint32_t enabled_mask; 169 uint32_t dirty_mask; 170 }; 171 172 struct vc5_vertex_stateobj { 173 struct pipe_vertex_element pipe[VC5_MAX_ATTRIBUTES]; 174 unsigned num_elements; 175 176 uint8_t attrs[12 * VC5_MAX_ATTRIBUTES]; 177 struct vc5_bo *default_attribute_values; 178 }; 179 180 struct vc5_streamout_stateobj { 181 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS]; 182 unsigned num_targets; 183 }; 184 185 /* Hash table key for vc5->jobs */ 186 struct vc5_job_key { 187 struct pipe_surface *cbufs[4]; 188 struct pipe_surface *zsbuf; 189 }; 190 191 /** 192 * A complete bin/render job. 193 * 194 * This is all of the state necessary to submit a bin/render to the kernel. 195 * We want to be able to have multiple in progress at a time, so that we don't 196 * need to flush an existing CL just to switch to rendering to a new render 197 * target (which would mean reading back from the old render target when 198 * starting to render to it again). 199 */ 200 struct vc5_job { 201 struct vc5_context *vc5; 202 struct vc5_cl bcl; 203 struct vc5_cl rcl; 204 struct vc5_cl indirect; 205 struct vc5_bo *tile_alloc; 206 struct vc5_bo *tile_state; 207 uint32_t shader_rec_count; 208 209 struct drm_vc5_submit_cl submit; 210 211 /** 212 * Set of all BOs referenced by the job. This will be used for making 213 * the list of BOs that the kernel will need to have paged in to 214 * execute our job. 215 */ 216 struct set *bos; 217 218 /** Sum of the sizes of the BOs referenced by the job. */ 219 uint32_t referenced_size; 220 221 struct set *write_prscs; 222 223 /* Size of the submit.bo_handles array. */ 224 uint32_t bo_handles_size; 225 226 /** @{ Surfaces to submit rendering for. */ 227 struct pipe_surface *cbufs[4]; 228 struct pipe_surface *zsbuf; 229 /** @} */ 230 /** @{ 231 * Bounding box of the scissor across all queued drawing. 232 * 233 * Note that the max values are exclusive. 234 */ 235 uint32_t draw_min_x; 236 uint32_t draw_min_y; 237 uint32_t draw_max_x; 238 uint32_t draw_max_y; 239 /** @} */ 240 /** @{ 241 * Width/height of the color framebuffer being rendered to, 242 * for VC5_TILE_RENDERING_MODE_CONFIG. 243 */ 244 uint32_t draw_width; 245 uint32_t draw_height; 246 /** @} */ 247 /** @{ Tile information, depending on MSAA and float color buffer. */ 248 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */ 249 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */ 250 251 uint32_t tile_width; /** @< Width of a tile. */ 252 uint32_t tile_height; /** @< Height of a tile. */ 253 /** maximum internal_bpp of all color render targets. */ 254 uint32_t internal_bpp; 255 256 /** Whether the current rendering is in a 4X MSAA tile buffer. */ 257 bool msaa; 258 /** @} */ 259 260 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the 261 * first rendering. 262 */ 263 uint32_t cleared; 264 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to 265 * (either clears or draws). 266 */ 267 uint32_t resolve; 268 uint32_t clear_color[4][4]; 269 float clear_z; 270 uint8_t clear_s; 271 272 /** 273 * Set if some drawing (triangles, blits, or just a glClear()) has 274 * been done to the FBO, meaning that we need to 275 * DRM_IOCTL_VC5_SUBMIT_CL. 276 */ 277 bool needs_flush; 278 279 /** 280 * Set if there is a nonzero address for OCCLUSION_QUERY_COUNTER. If 281 * so, we need to disable it and flush before ending the CL, to keep 282 * the next tile from starting with it enabled. 283 */ 284 bool oq_enabled; 285 286 bool uses_early_z; 287 288 /** 289 * Number of draw calls (not counting full buffer clears) queued in 290 * the current job. 291 */ 292 uint32_t draw_calls_queued; 293 294 struct vc5_job_key key; 295 }; 296 297 struct vc5_context { 298 struct pipe_context base; 299 300 int fd; 301 struct vc5_screen *screen; 302 303 /** The 3D rendering job for the currently bound FBO. */ 304 struct vc5_job *job; 305 306 /* Map from struct vc5_job_key to the job for that FBO. 307 */ 308 struct hash_table *jobs; 309 310 /** 311 * Map from vc5_resource to a job writing to that resource. 312 * 313 * Primarily for flushing jobs rendering to textures that are now 314 * being read from. 315 */ 316 struct hash_table *write_jobs; 317 318 struct slab_child_pool transfer_pool; 319 struct blitter_context *blitter; 320 321 /** bitfield of VC5_DIRTY_* */ 322 uint32_t dirty; 323 324 struct primconvert_context *primconvert; 325 326 struct hash_table *fs_cache, *vs_cache; 327 uint32_t next_uncompiled_program_id; 328 uint64_t next_compiled_program_id; 329 330 struct vc5_compiler_state *compiler_state; 331 332 uint8_t prim_mode; 333 334 /** Maximum index buffer valid for the current shader_rec. */ 335 uint32_t max_index; 336 337 /** Seqno of the last CL flush's job. */ 338 uint64_t last_emit_seqno; 339 340 struct u_upload_mgr *uploader; 341 342 /** @{ Current pipeline state objects */ 343 struct pipe_scissor_state scissor; 344 struct pipe_blend_state *blend; 345 struct vc5_rasterizer_state *rasterizer; 346 struct vc5_depth_stencil_alpha_state *zsa; 347 348 struct vc5_texture_stateobj verttex, fragtex; 349 350 struct vc5_program_stateobj prog; 351 352 struct vc5_vertex_stateobj *vtx; 353 354 struct { 355 struct pipe_blend_color f; 356 uint16_t hf[4]; 357 } blend_color; 358 struct pipe_stencil_ref stencil_ref; 359 unsigned sample_mask; 360 struct pipe_framebuffer_state framebuffer; 361 362 /* Per render target, whether we should swap the R and B fields in the 363 * shader's color output and in blending. If render targets disagree 364 * on the R/B swap and use the constant color, then we would need to 365 * fall back to in-shader blending. 366 */ 367 uint8_t swap_color_rb; 368 369 /* Per render target, whether we should treat the dst alpha values as 370 * one in blending. 371 * 372 * For RGBX formats, the tile buffer's alpha channel will be 373 * undefined. 374 */ 375 uint8_t blend_dst_alpha_one; 376 377 bool active_queries; 378 379 uint32_t tf_prims_generated; 380 uint32_t prims_generated; 381 382 struct pipe_poly_stipple stipple; 383 struct pipe_clip_state clip; 384 struct pipe_viewport_state viewport; 385 struct vc5_constbuf_stateobj constbuf[PIPE_SHADER_TYPES]; 386 struct vc5_vertexbuf_stateobj vertexbuf; 387 struct vc5_streamout_stateobj streamout; 388 struct vc5_bo *current_oq; 389 /** @} */ 390 }; 391 392 struct vc5_rasterizer_state { 393 struct pipe_rasterizer_state base; 394 395 /* VC5_CONFIGURATION_BITS */ 396 uint8_t config_bits[3]; 397 398 float point_size; 399 400 /** 401 * Half-float (1/8/7 bits) value of polygon offset units for 402 * VC5_PACKET_DEPTH_OFFSET 403 */ 404 uint16_t offset_units; 405 /** 406 * Half-float (1/8/7 bits) value of polygon offset scale for 407 * VC5_PACKET_DEPTH_OFFSET 408 */ 409 uint16_t offset_factor; 410 }; 411 412 struct vc5_depth_stencil_alpha_state { 413 struct pipe_depth_stencil_alpha_state base; 414 415 bool early_z_enable; 416 417 /** Uniforms for stencil state. 418 * 419 * Index 0 is either the front config, or the front-and-back config. 420 * Index 1 is the back config if doing separate back stencil. 421 * Index 2 is the writemask config if it's not a common mask value. 422 */ 423 uint32_t stencil_uniforms[3]; 424 425 uint8_t stencil_front[6]; 426 uint8_t stencil_back[6]; 427 }; 428 429 #define perf_debug(...) do { \ 430 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \ 431 fprintf(stderr, __VA_ARGS__); \ 432 } while (0) 433 434 static inline struct vc5_context * 435 vc5_context(struct pipe_context *pcontext) 436 { 437 return (struct vc5_context *)pcontext; 438 } 439 440 static inline struct vc5_sampler_view * 441 vc5_sampler_view(struct pipe_sampler_view *psview) 442 { 443 return (struct vc5_sampler_view *)psview; 444 } 445 446 static inline struct vc5_sampler_state * 447 vc5_sampler_state(struct pipe_sampler_state *psampler) 448 { 449 return (struct vc5_sampler_state *)psampler; 450 } 451 452 struct pipe_context *vc5_context_create(struct pipe_screen *pscreen, 453 void *priv, unsigned flags); 454 void vc5_program_init(struct pipe_context *pctx); 455 void vc5_program_fini(struct pipe_context *pctx); 456 void vc5_query_init(struct pipe_context *pctx); 457 458 void vc5_simulator_init(struct vc5_screen *screen); 459 void vc5_simulator_destroy(struct vc5_screen *screen); 460 int vc5_simulator_flush(struct vc5_context *vc5, 461 struct drm_vc5_submit_cl *args, 462 struct vc5_job *job); 463 int vc5_simulator_ioctl(int fd, unsigned long request, void *arg); 464 void vc5_simulator_open_from_handle(int fd, uint32_t winsys_stride, 465 int handle, uint32_t size); 466 467 static inline int 468 vc5_ioctl(int fd, unsigned long request, void *arg) 469 { 470 if (using_vc5_simulator) 471 return vc5_simulator_ioctl(fd, request, arg); 472 else 473 return drmIoctl(fd, request, arg); 474 } 475 476 void vc5_set_shader_uniform_dirty_flags(struct vc5_compiled_shader *shader); 477 struct vc5_cl_reloc vc5_write_uniforms(struct vc5_context *vc5, 478 struct vc5_compiled_shader *shader, 479 struct vc5_constbuf_stateobj *cb, 480 struct vc5_texture_stateobj *texstate); 481 482 void vc5_flush(struct pipe_context *pctx); 483 void vc5_job_init(struct vc5_context *vc5); 484 struct vc5_job *vc5_get_job(struct vc5_context *vc5, 485 struct pipe_surface **cbufs, 486 struct pipe_surface *zsbuf); 487 struct vc5_job *vc5_get_job_for_fbo(struct vc5_context *vc5); 488 void vc5_job_add_bo(struct vc5_job *job, struct vc5_bo *bo); 489 void vc5_job_add_write_resource(struct vc5_job *job, struct pipe_resource *prsc); 490 void vc5_job_submit(struct vc5_context *vc5, struct vc5_job *job); 491 void vc5_flush_jobs_writing_resource(struct vc5_context *vc5, 492 struct pipe_resource *prsc); 493 void vc5_flush_jobs_reading_resource(struct vc5_context *vc5, 494 struct pipe_resource *prsc); 495 void vc5_update_compiled_shaders(struct vc5_context *vc5, uint8_t prim_mode); 496 497 bool vc5_rt_format_supported(const struct v3d_device_info *devinfo, 498 enum pipe_format f); 499 bool vc5_tex_format_supported(const struct v3d_device_info *devinfo, 500 enum pipe_format f); 501 uint8_t vc5_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f); 502 uint8_t vc5_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f); 503 uint8_t vc5_get_tex_return_size(const struct v3d_device_info *devinfo, 504 enum pipe_format f, 505 enum pipe_tex_compare compare); 506 uint8_t vc5_get_tex_return_channels(const struct v3d_device_info *devinfo, 507 enum pipe_format f); 508 const uint8_t *vc5_get_format_swizzle(const struct v3d_device_info *devinfo, 509 enum pipe_format f); 510 void vc5_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo, 511 uint32_t format, 512 uint32_t *type, 513 uint32_t *bpp); 514 515 void vc5_init_query_functions(struct vc5_context *vc5); 516 void vc5_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info); 517 void vc5_blitter_save(struct vc5_context *vc5); 518 519 #ifdef v3dX 520 # include "v3dx_context.h" 521 #else 522 # define v3dX(x) v3d33_##x 523 # include "v3dx_context.h" 524 # undef v3dX 525 526 # define v3dX(x) v3d41_##x 527 # include "v3dx_context.h" 528 # undef v3dX 529 #endif 530 531 #endif /* VC5_CONTEXT_H */ 532
