1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2000-2004 4 * Wolfgang Denk, DENX Software Engineering, wd (at) denx.de. 5 */ 6 7 #ifndef _PCMCIA_H 8 #define _PCMCIA_H 9 10 #include <common.h> 11 #include <config.h> 12 13 /* 14 * Allow configuration to select PCMCIA slot, 15 * or try to generate a useful default 16 */ 17 #if defined(CONFIG_CMD_PCMCIA) 18 19 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 20 # error "PCMCIA Slot not configured" 21 #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */ 22 23 /* Make sure exactly one slot is defined - we support only one for now */ 24 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) 25 #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured 26 #endif 27 #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B) 28 #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured 29 #endif 30 31 #ifndef PCMCIA_SOCKETS_NO 32 #define PCMCIA_SOCKETS_NO 1 33 #endif 34 #ifndef PCMCIA_MEM_WIN_NO 35 #define PCMCIA_MEM_WIN_NO 4 36 #endif 37 #define PCMCIA_IO_WIN_NO 2 38 39 /* define _slot_ to be able to optimize macros */ 40 #ifdef CONFIG_PCMCIA_SLOT_A 41 # define _slot_ 0 42 # define PCMCIA_SLOT_MSG "slot A" 43 # define PCMCIA_SLOT_x PCMCIA_PSLOT_A 44 #else 45 # define _slot_ 1 46 # define PCMCIA_SLOT_MSG "slot B" 47 # define PCMCIA_SLOT_x PCMCIA_PSLOT_B 48 #endif 49 50 /* 51 * This structure is used to address each window in the PCMCIA controller. 52 * 53 * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly 54 * after pcmcia_win_t[n]... 55 */ 56 57 typedef struct { 58 ulong br; 59 ulong or; 60 } pcmcia_win_t; 61 62 /**********************************************************************/ 63 64 /* 65 * CIS Tupel codes 66 */ 67 #define CISTPL_NULL 0x00 68 #define CISTPL_DEVICE 0x01 69 #define CISTPL_LONGLINK_CB 0x02 70 #define CISTPL_INDIRECT 0x03 71 #define CISTPL_CONFIG_CB 0x04 72 #define CISTPL_CFTABLE_ENTRY_CB 0x05 73 #define CISTPL_LONGLINK_MFC 0x06 74 #define CISTPL_BAR 0x07 75 #define CISTPL_PWR_MGMNT 0x08 76 #define CISTPL_EXTDEVICE 0x09 77 #define CISTPL_CHECKSUM 0x10 78 #define CISTPL_LONGLINK_A 0x11 79 #define CISTPL_LONGLINK_C 0x12 80 #define CISTPL_LINKTARGET 0x13 81 #define CISTPL_NO_LINK 0x14 82 #define CISTPL_VERS_1 0x15 83 #define CISTPL_ALTSTR 0x16 84 #define CISTPL_DEVICE_A 0x17 85 #define CISTPL_JEDEC_C 0x18 86 #define CISTPL_JEDEC_A 0x19 87 #define CISTPL_CONFIG 0x1a 88 #define CISTPL_CFTABLE_ENTRY 0x1b 89 #define CISTPL_DEVICE_OC 0x1c 90 #define CISTPL_DEVICE_OA 0x1d 91 #define CISTPL_DEVICE_GEO 0x1e 92 #define CISTPL_DEVICE_GEO_A 0x1f 93 #define CISTPL_MANFID 0x20 94 #define CISTPL_FUNCID 0x21 95 #define CISTPL_FUNCE 0x22 96 #define CISTPL_SWIL 0x23 97 #define CISTPL_END 0xff 98 99 /* 100 * CIS Function ID codes 101 */ 102 #define CISTPL_FUNCID_MULTI 0x00 103 #define CISTPL_FUNCID_MEMORY 0x01 104 #define CISTPL_FUNCID_SERIAL 0x02 105 #define CISTPL_FUNCID_PARALLEL 0x03 106 #define CISTPL_FUNCID_FIXED 0x04 107 #define CISTPL_FUNCID_VIDEO 0x05 108 #define CISTPL_FUNCID_NETWORK 0x06 109 #define CISTPL_FUNCID_AIMS 0x07 110 #define CISTPL_FUNCID_SCSI 0x08 111 112 /* 113 * Fixed Disk FUNCE codes 114 */ 115 #define CISTPL_IDE_INTERFACE 0x01 116 117 #define CISTPL_FUNCE_IDE_IFACE 0x01 118 #define CISTPL_FUNCE_IDE_MASTER 0x02 119 #define CISTPL_FUNCE_IDE_SLAVE 0x03 120 121 /* First feature byte */ 122 #define CISTPL_IDE_SILICON 0x04 123 #define CISTPL_IDE_UNIQUE 0x08 124 #define CISTPL_IDE_DUAL 0x10 125 126 /* Second feature byte */ 127 #define CISTPL_IDE_HAS_SLEEP 0x01 128 #define CISTPL_IDE_HAS_STANDBY 0x02 129 #define CISTPL_IDE_HAS_IDLE 0x04 130 #define CISTPL_IDE_LOW_POWER 0x08 131 #define CISTPL_IDE_REG_INHIBIT 0x10 132 #define CISTPL_IDE_HAS_INDEX 0x20 133 #define CISTPL_IDE_IOIS16 0x40 134 135 #endif 136 137 #endif /* _PCMCIA_H */ 138
