1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 1996, 99 Ralf Baechle 4 * Copyright (C) 2000, 2002 Maciej W. Rozycki 5 * Copyright (C) 1990, 1999 by Silicon Graphics, Inc. 6 */ 7 #ifndef _ASM_ADDRSPACE_H 8 #define _ASM_ADDRSPACE_H 9 10 #include <spaces.h> 11 12 /* 13 * Configure language 14 */ 15 #ifdef __ASSEMBLY__ 16 #define _ATYPE_ 17 #define _ATYPE32_ 18 #define _ATYPE64_ 19 #define _CONST64_(x) x 20 #else 21 #define _ATYPE_ __PTRDIFF_TYPE__ 22 #define _ATYPE32_ int 23 #define _ATYPE64_ __s64 24 #ifdef CONFIG_64BIT 25 #define _CONST64_(x) x ## L 26 #else 27 #define _CONST64_(x) x ## LL 28 #endif 29 #endif 30 31 /* 32 * 32-bit MIPS address spaces 33 */ 34 #ifdef __ASSEMBLY__ 35 #define _ACAST32_ 36 #define _ACAST64_ 37 #else 38 #define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */ 39 #define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */ 40 #endif 41 42 /* 43 * Returns the kernel segment base of a given address 44 */ 45 #define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000) 46 47 /* 48 * Returns the physical address of a CKSEGx / XKPHYS address 49 */ 50 #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) 51 #define XPHYSADDR(a) ((_ACAST64_(a)) & \ 52 _CONST64_(0x0000ffffffffffff)) 53 54 #ifdef CONFIG_64BIT 55 56 /* 57 * Memory segments (64bit kernel mode addresses) 58 * The compatibility segments use the full 64-bit sign extended value. Note 59 * the R8000 doesn't have them so don't reference these in generic MIPS code. 60 */ 61 #define XKUSEG _CONST64_(0x0000000000000000) 62 #define XKSSEG _CONST64_(0x4000000000000000) 63 #define XKPHYS _CONST64_(0x8000000000000000) 64 #define XKSEG _CONST64_(0xc000000000000000) 65 #define CKSEG0 _CONST64_(0xffffffff80000000) 66 #define CKSEG1 _CONST64_(0xffffffffa0000000) 67 #define CKSSEG _CONST64_(0xffffffffc0000000) 68 #define CKSEG3 _CONST64_(0xffffffffe0000000) 69 70 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) 71 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) 72 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) 73 #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) 74 75 #else 76 77 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 78 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 79 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 80 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 81 82 /* 83 * Map an address to a certain kernel segment 84 */ 85 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) 86 #define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) 87 #define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) 88 #define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) 89 90 /* 91 * Memory segments (32bit kernel mode addresses) 92 * These are the traditional names used in the 32-bit universe. 93 */ 94 #define KUSEG 0x00000000 95 #define KSEG0 0x80000000 96 #define KSEG1 0xa0000000 97 #define KSEG2 0xc0000000 98 #define KSEG3 0xe0000000 99 100 #define CKUSEG 0x00000000 101 #define CKSEG0 0x80000000 102 #define CKSEG1 0xa0000000 103 #define CKSEG2 0xc0000000 104 #define CKSEG3 0xe0000000 105 106 #endif 107 108 /* 109 * Cache modes for XKPHYS address conversion macros 110 */ 111 #define K_CALG_COH_EXCL1_NOL2 0 112 #define K_CALG_COH_SHRL1_NOL2 1 113 #define K_CALG_UNCACHED 2 114 #define K_CALG_NONCOHERENT 3 115 #define K_CALG_COH_EXCL 4 116 #define K_CALG_COH_SHAREABLE 5 117 #define K_CALG_NOTUSED 6 118 #define K_CALG_UNCACHED_ACCEL 7 119 120 /* 121 * 64-bit address conversions 122 */ 123 #define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p)) 124 #define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p)) 125 #define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) 126 #define PHYS_TO_XKPHYS(cm, a) (_CONST64_(0x8000000000000000) | \ 127 (_CONST64_(cm) << 59) | (a)) 128 129 /* 130 * Returns the uncached address of a sdram address 131 */ 132 #ifndef __ASSEMBLY__ 133 #if defined(CONFIG_SOC_AU1X00) || defined(CONFIG_TB0229) 134 /* We use a 36 bit physical address map here and 135 cannot access physical memory directly from core */ 136 #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) 137 #else /* !CONFIG_SOC_AU1X00 */ 138 #define UNCACHED_SDRAM(a) CKSEG1ADDR(a) 139 #endif /* CONFIG_SOC_AU1X00 */ 140 #endif /* __ASSEMBLY__ */ 141 142 /* 143 * The ultimate limited of the 64-bit MIPS architecture: 2 bits for selecting 144 * the region, 3 bits for the CCA mode. This leaves 59 bits of which the 145 * R8000 implements most with its 48-bit physical address space. 146 */ 147 #define TO_PHYS_MASK _CONST64_(0x07ffffffffffffff) /* 2^^59 - 1 */ 148 149 #ifndef CONFIG_CPU_R8000 150 151 /* 152 * The R8000 doesn't have the 32-bit compat spaces so we don't define them 153 * in order to catch bugs in the source code. 154 */ 155 156 #define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000) 157 #define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */ 158 159 #endif 160 161 #define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) 162 #define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) 163 164 #endif /* _ASM_ADDRSPACE_H */ 165
