| /external/llvm/lib/Target/Lanai/ |
| LanaiInstrInfo.h | 95 unsigned &SrcReg2, int &CmpMask,
102 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| LanaiInstrInfo.cpp | 180 unsigned &SrcReg2, int &CmpMask,
189 CmpMask = ~0;
195 CmpMask = ~0;
286 MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| LanaiInstrInfo.h | 97 unsigned &SrcReg2, int &CmpMask,
104 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| LanaiInstrInfo.cpp | 179 unsigned &SrcReg2, int &CmpMask,
188 CmpMask = ~0;
194 CmpMask = ~0;
285 MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int /*CmpMask*/,
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 166 unsigned &SrcReg2, int &CmpMask,
171 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| AArch64InstrInfo.cpp | 693 unsigned &SrcReg2, int &CmpMask,
713 CmpMask = ~0;
722 CmpMask = ~0;
732 CmpMask = ~0;
883 MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask,
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 338 int CmpMask, CmpValue;
339 if (!TII->AnalyzeCompare(MI, SrcReg, CmpMask, CmpValue) ||
344 if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI)) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 191 int &CmpMask, int &CmpValue) const;
196 int CmpMask, int CmpValue,
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 196 unsigned &SrcReg2, int &CmpMask,
201 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| AArch64InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 254 unsigned &SrcReg2, int &CmpMask,
262 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 504 unsigned &SrcReg2, int &CmpMask,
511 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 285 unsigned &SrcReg2, int &CmpMask,
293 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 519 unsigned &SrcReg2, int &CmpMask,
526 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 566 int CmpMask, CmpValue;
567 if (!TII->analyzeCompare(*MI, SrcReg, SrcReg2, CmpMask, CmpValue) ||
573 if (TII->optimizeCompareInstr(*MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) {
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 611 int CmpMask, CmpValue;
612 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) ||
618 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | 452 int CmpImm = 0, CmpMask = 0;
454 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | 471 int CmpImm = 0, CmpMask = 0;
473 TII->analyzeCompare(*PredI, CmpReg1, CmpReg2, CmpMask, CmpImm);
[all...] |
